drivers/gpu/drm/msm/adreno/adreno_gpu.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/msm/adreno/adreno_gpu.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/msm/adreno/adreno_gpu.h
Extension
.h
Size
19977 bytes
Lines
765
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct adreno_gpu_funcs {
	struct msm_gpu_funcs base;
	struct msm_gpu *(*init)(struct drm_device *dev);
	u64 (*get_timestamp)(struct msm_gpu *gpu);
	void (*bus_halt)(struct adreno_gpu *adreno_gpu, bool gx_off);
	int (*mmu_fault_handler)(void *arg, unsigned long iova, int flags, void *data);
	bool (*gx_is_on)(struct adreno_gpu *adreno_gpu);
	bool (*aqe_is_enabled)(struct adreno_gpu *adreno_gpu);
};

struct adreno_reglist {
	u32 offset;
	u32 value;
};

/* Reglist with pipe information */
struct adreno_reglist_pipe {
	u32 offset;
	u32 value;
	u32 pipe;
};

struct adreno_speedbin {
	uint16_t fuse;
	uint16_t speedbin;
};

struct a6xx_info;

struct adreno_info {
	const char *machine;
	/**
	 * @chipids: Table of matching chip-ids
	 *
	 * Terminated with 0 sentinal
	 */
	uint32_t *chip_ids;
	enum adreno_family family;
	uint32_t revn;
	const char *fw[ADRENO_FW_MAX];
	uint32_t gmem;
	u64 quirks;
	const struct adreno_gpu_funcs *funcs;
	const char *zapfw;
	u32 inactive_period;
	union {
		const struct a6xx_info *a6xx;
	};
	/**
	 * @speedbins: Optional table of fuse to speedbin mappings
	 *
	 * Consists of pairs of fuse, index mappings, terminated with
	 * {SHRT_MAX, 0} sentinal.
	 */
	struct adreno_speedbin *speedbins;
	u64 preempt_record_size;
};

#define ADRENO_CHIP_IDS(tbl...) (uint32_t[]) { tbl, 0 }

struct adreno_gpulist {
	const struct adreno_info *gpus;
	unsigned gpus_count;
};

#define DECLARE_ADRENO_GPULIST(name)                  \
const struct adreno_gpulist name ## _gpulist = {      \
	name ## _gpus, ARRAY_SIZE(name ## _gpus)      \
}

/*
 * Helper to build a speedbin table, ie. the table:
 *      fuse | speedbin
 *      -----+---------
 *        0  |   0
 *       169 |   1
 *       174 |   2
 *
 * would be declared as:
 *
 *     .speedbins = ADRENO_SPEEDBINS(
 *                      { 0,   0 },
 *                      { 169, 1 },
 *                      { 174, 2 },
 *     ),
 */
#define ADRENO_SPEEDBINS(tbl...) (struct adreno_speedbin[]) { tbl {SHRT_MAX, 0} }

struct adreno_protect {
	const uint32_t *regs;

Annotation

Implementation Notes