drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c
Extension
.c
Size
84860 bytes
Lines
2948
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct dpu_encoder_virt {
	struct drm_encoder base;
	spinlock_t enc_spinlock;

	bool enabled;
	bool commit_done_timedout;

	unsigned int num_phys_encs;
	struct dpu_encoder_phys *phys_encs[MAX_PHYS_ENCODERS_PER_VIRTUAL];
	struct dpu_encoder_phys *cur_master;
	struct dpu_encoder_phys *cur_slave;
	struct dpu_hw_pingpong *hw_pp[MAX_CHANNELS_PER_ENC];
	struct dpu_hw_cwb *hw_cwb[MAX_CWB_PER_ENC];
	struct dpu_hw_dsc *hw_dsc[MAX_CHANNELS_PER_ENC];

	unsigned int dsc_mask;
	unsigned int cwb_mask;

	bool intfs_swapped;

	struct drm_crtc *crtc;
	struct drm_connector *connector;

	struct mutex enc_lock;
	DECLARE_BITMAP(frame_busy_mask, MAX_PHYS_ENCODERS_PER_VIRTUAL);

	atomic_t frame_done_timeout_ms;
	atomic_t frame_done_timeout_cnt;
	struct timer_list frame_done_timer;

	struct msm_display_info disp_info;

	bool idle_pc_supported;
	struct mutex rc_lock;
	enum dpu_enc_rc_states rc_state;
	struct delayed_work delayed_off_work;
	struct msm_display_topology topology;

	u32 idle_timeout;

	bool wide_bus_en;

	/* DSC configuration */
	struct drm_dsc_config *dsc;
};

#define to_dpu_encoder_virt(x) container_of(x, struct dpu_encoder_virt, base)

static u32 dither_matrix[DITHER_MATRIX_SZ] = {
	15, 7, 13, 5, 3, 11, 1, 9, 12, 4, 14, 6, 0, 8, 2, 10
};

/**
 * dpu_encoder_get_drm_fmt - return DRM fourcc format
 * @phys_enc: Pointer to physical encoder structure
 */
u32 dpu_encoder_get_drm_fmt(struct dpu_encoder_phys *phys_enc)
{
	struct drm_encoder *drm_enc;
	struct dpu_encoder_virt *dpu_enc;
	struct drm_display_info *info;
	struct drm_display_mode *mode;

	drm_enc = phys_enc->parent;
	dpu_enc = to_dpu_encoder_virt(drm_enc);
	info = &dpu_enc->connector->display_info;
	mode = &phys_enc->cached_mode;

	if (drm_mode_is_420_only(info, mode))
		return DRM_FORMAT_YUV420;

	return DRM_FORMAT_RGB888;
}

/**
 * dpu_encoder_needs_periph_flush - return true if physical encoder requires
 *	peripheral flush
 * @phys_enc: Pointer to physical encoder structure
 */
bool dpu_encoder_needs_periph_flush(struct dpu_encoder_phys *phys_enc)
{
	struct drm_encoder *drm_enc;
	struct dpu_encoder_virt *dpu_enc;
	struct msm_display_info *disp_info;
	struct msm_drm_private *priv;
	struct drm_display_mode *mode;

	drm_enc = phys_enc->parent;
	dpu_enc = to_dpu_encoder_virt(drm_enc);
	disp_info = &dpu_enc->disp_info;

Annotation

Implementation Notes