drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h
Extension
.h
Size
3420 bytes
Lines
102
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct msm_display_info {
	enum dpu_intf_type intf_type;
	uint32_t num_of_h_tiles;
	uint32_t h_tile_instance[MAX_H_TILES_PER_DISPLAY];
	bool is_cmd_mode;
	enum dpu_vsync_source vsync_source;
};

void dpu_encoder_assign_crtc(struct drm_encoder *encoder,
			     struct drm_crtc *crtc);

void dpu_encoder_toggle_vblank_for_crtc(struct drm_encoder *encoder,
					struct drm_crtc *crtc, bool enable);

void dpu_encoder_prepare_for_kickoff(struct drm_encoder *encoder);

void dpu_encoder_trigger_kickoff_pending(struct drm_encoder *encoder);

void dpu_encoder_kickoff(struct drm_encoder *encoder);

int dpu_encoder_vsync_time(struct drm_encoder *drm_enc, ktime_t *wakeup_time);

int dpu_encoder_wait_for_commit_done(struct drm_encoder *drm_encoder);

int dpu_encoder_wait_for_tx_complete(struct drm_encoder *drm_encoder);

enum dpu_intf_mode dpu_encoder_get_intf_mode(struct drm_encoder *encoder);

void dpu_encoder_virt_runtime_resume(struct drm_encoder *encoder);

uint32_t dpu_encoder_get_clones(struct drm_encoder *drm_enc);

struct drm_encoder *dpu_encoder_init(struct drm_device *dev,
		int drm_enc_mode,
		struct msm_display_info *disp_info);

int dpu_encoder_get_linecount(struct drm_encoder *drm_enc);

int dpu_encoder_get_vsync_count(struct drm_encoder *drm_enc);

bool dpu_encoder_is_widebus_enabled(const struct drm_encoder *drm_enc);

bool dpu_encoder_is_dsc_enabled(const struct drm_encoder *drm_enc);

int dpu_encoder_get_crc_values_cnt(const struct drm_encoder *drm_enc);

void dpu_encoder_setup_misr(const struct drm_encoder *drm_encoder);

int dpu_encoder_get_crc(const struct drm_encoder *drm_enc, u32 *crcs, int pos);

bool dpu_encoder_use_dsc_merge(struct drm_encoder *drm_enc);

void dpu_encoder_update_topology(struct drm_encoder *drm_enc,
				 struct msm_display_topology *topology,
				 struct drm_atomic_commit *state,
				 const struct drm_display_mode *adj_mode);

bool dpu_encoder_needs_modeset(struct drm_encoder *drm_enc, struct drm_atomic_commit *state);

void dpu_encoder_prepare_wb_job(struct drm_encoder *drm_enc,
		struct drm_writeback_job *job);

void dpu_encoder_cleanup_wb_job(struct drm_encoder *drm_enc,
		struct drm_writeback_job *job);

bool dpu_encoder_is_valid_for_commit(struct drm_encoder *drm_enc);

void dpu_encoder_start_frame_done_timer(struct drm_encoder *drm_enc);
#endif /* __DPU_ENCODER_H__ */

Annotation

Implementation Notes