drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c- Extension
.c- Size
- 21664 bytes
- Lines
- 790
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/slab.hlinux/of_address.hlinux/platform_device.hdpu_hw_mdss.hdpu_hw_interrupts.hdpu_hw_catalog.hdpu_kms.hcatalog/dpu_1_7_msm8996.hcatalog/dpu_1_14_msm8937.hcatalog/dpu_1_15_msm8917.hcatalog/dpu_1_16_msm8953.hcatalog/dpu_3_0_msm8998.hcatalog/dpu_3_2_sdm660.hcatalog/dpu_3_3_sdm630.hcatalog/dpu_4_0_sdm845.hcatalog/dpu_4_1_sdm670.hcatalog/dpu_5_0_sm8150.hcatalog/dpu_5_1_sc8180x.hcatalog/dpu_5_2_sm7150.hcatalog/dpu_5_3_sm6150.hcatalog/dpu_5_4_sm6125.hcatalog/dpu_6_0_sm8250.hcatalog/dpu_6_2_sc7180.hcatalog/dpu_6_3_sm6115.hcatalog/dpu_6_4_sm6350.hcatalog/dpu_6_5_qcm2290.hcatalog/dpu_6_9_sm6375.hcatalog/dpu_7_0_sm8350.hcatalog/dpu_7_2_sc7280.hcatalog/dpu_8_0_sc8280xp.hcatalog/dpu_8_1_sm8450.hcatalog/dpu_8_4_sa8775p.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
* Copyright (c) 2022-2023, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#define pr_fmt(fmt) "[drm:%s:%d] " fmt, __func__, __LINE__
#include <linux/slab.h>
#include <linux/of_address.h>
#include <linux/platform_device.h>
#include "dpu_hw_mdss.h"
#include "dpu_hw_interrupts.h"
#include "dpu_hw_catalog.h"
#include "dpu_kms.h"
#define VIG_BASE_MASK \
(BIT(DPU_SSPP_QOS) |\
BIT(DPU_SSPP_CDP) |\
BIT(DPU_SSPP_TS_PREFILL) | BIT(DPU_SSPP_EXCL_RECT))
#define VIG_MASK \
(VIG_BASE_MASK | \
BIT(DPU_SSPP_CSC_10BIT))
#define VIG_MSM8953_MASK \
(BIT(DPU_SSPP_QOS) |\
BIT(DPU_SSPP_SCALER_QSEED2) |\
BIT(DPU_SSPP_CSC))
#define VIG_MSM8996_MASK \
(BIT(DPU_SSPP_QOS) | BIT(DPU_SSPP_CDP) |\
BIT(DPU_SSPP_TS_PREFILL) | BIT(DPU_SSPP_SCALER_QSEED2) |\
BIT(DPU_SSPP_CSC))
#define VIG_MSM8998_MASK \
(VIG_MASK | BIT(DPU_SSPP_SCALER_QSEED3_COMPATIBLE))
#define VIG_SDM845_MASK_NO_SDMA \
(VIG_MASK | BIT(DPU_SSPP_SCALER_QSEED3_COMPATIBLE))
#define VIG_SDM845_MASK_SDMA \
(VIG_SDM845_MASK_NO_SDMA | BIT(DPU_SSPP_SMART_DMA_V2))
#define VIG_QCM2290_MASK (VIG_BASE_MASK)
#define DMA_MSM8953_MASK \
(BIT(DPU_SSPP_QOS))
#define DMA_MSM8996_MASK \
(BIT(DPU_SSPP_QOS) | BIT(DPU_SSPP_TS_PREFILL) | BIT(DPU_SSPP_CDP))
#define DMA_MSM8998_MASK \
(BIT(DPU_SSPP_QOS) |\
BIT(DPU_SSPP_TS_PREFILL) | BIT(DPU_SSPP_TS_PREFILL_REC1) |\
BIT(DPU_SSPP_CDP) | BIT(DPU_SSPP_EXCL_RECT))
#define VIG_SC7280_MASK \
(VIG_SDM845_MASK_NO_SDMA | BIT(DPU_SSPP_INLINE_ROTATION))
#define VIG_SC7280_MASK_SDMA \
(VIG_SC7280_MASK | BIT(DPU_SSPP_SMART_DMA_V2))
#define DMA_SDM845_MASK_NO_SDMA \
(BIT(DPU_SSPP_QOS) | \
BIT(DPU_SSPP_TS_PREFILL) | BIT(DPU_SSPP_TS_PREFILL_REC1) |\
BIT(DPU_SSPP_CDP) | BIT(DPU_SSPP_EXCL_RECT))
#define DMA_CURSOR_SDM845_MASK_NO_SDMA \
(DMA_SDM845_MASK_NO_SDMA | BIT(DPU_SSPP_CURSOR))
#define DMA_SDM845_MASK_SDMA \
(DMA_SDM845_MASK_NO_SDMA | BIT(DPU_SSPP_SMART_DMA_V2))
#define DMA_CURSOR_SDM845_MASK_SDMA \
(DMA_CURSOR_SDM845_MASK_NO_SDMA | BIT(DPU_SSPP_SMART_DMA_V2))
#define DMA_CURSOR_MSM8996_MASK \
(DMA_MSM8996_MASK | BIT(DPU_SSPP_CURSOR))
#define DMA_CURSOR_MSM8998_MASK \
(DMA_MSM8998_MASK | BIT(DPU_SSPP_CURSOR))
#define RGB_MSM8953_MASK \
(BIT(DPU_SSPP_QOS))
#define RGB_MSM8996_MASK \
(BIT(DPU_SSPP_QOS) | BIT(DPU_SSPP_CDP) |\
BIT(DPU_SSPP_TS_PREFILL) | BIT(DPU_SSPP_SCALER_RGB))
#define MIXER_MSM8998_MASK \
(BIT(DPU_MIXER_SOURCESPLIT))
Annotation
- Immediate include surface: `linux/slab.h`, `linux/of_address.h`, `linux/platform_device.h`, `dpu_hw_mdss.h`, `dpu_hw_interrupts.h`, `dpu_hw_catalog.h`, `dpu_kms.h`, `catalog/dpu_1_7_msm8996.h`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.