drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cwb.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cwb.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cwb.h- Extension
.h- Size
- 1598 bytes
- Lines
- 70
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
dpu_hw_util.h
Detected Declarations
struct dpu_hw_cwbstruct dpu_hw_cwb_setup_cfgstruct dpu_hw_cwb_opsstruct dpu_hw_cwbenum cwb_mode_input
Annotated Snippet
struct dpu_hw_cwb_setup_cfg {
enum dpu_pingpong pp_idx;
enum cwb_mode_input input;
};
/**
* struct dpu_hw_cwb_ops : Interface to the cwb hw driver functions
* @config_cwb: configure CWB mux
*/
struct dpu_hw_cwb_ops {
void (*config_cwb)(struct dpu_hw_cwb *ctx,
struct dpu_hw_cwb_setup_cfg *cwb_cfg);
};
/**
* struct dpu_hw_cwb : CWB mux driver object
* @base: Hardware block base structure
* @hw: Block hardware details
* @idx: CWB index
* @ops: handle to operations possible for this CWB
*/
struct dpu_hw_cwb {
struct dpu_hw_blk base;
struct dpu_hw_blk_reg_map hw;
enum dpu_cwb idx;
struct dpu_hw_cwb_ops ops;
};
/**
* to_dpu_hw_cwb - convert base object dpu_hw_base to container
* @hw: Pointer to base hardware block
* return: Pointer to hardware block container
*/
static inline struct dpu_hw_cwb *to_dpu_hw_cwb(struct dpu_hw_blk *hw)
{
return container_of(hw, struct dpu_hw_cwb, base);
}
struct dpu_hw_cwb *dpu_hw_cwb_init(struct drm_device *dev,
const struct dpu_cwb_cfg *cfg,
void __iomem *addr);
#endif /*_DPU_HW_CWB_H */
Annotation
- Immediate include surface: `dpu_hw_util.h`.
- Detected declarations: `struct dpu_hw_cwb`, `struct dpu_hw_cwb_setup_cfg`, `struct dpu_hw_cwb_ops`, `struct dpu_hw_cwb`, `enum cwb_mode_input`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.