drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.h
Extension
.h
Size
1941 bytes
Lines
76
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct dpu_hw_intr_entry {
	void (*cb)(void *arg);
	void *arg;
	atomic_t count;
};

/**
 * struct dpu_hw_intr: hw interrupts handling data structure
 * @hw:               virtual address mapping
 * @ops:              function pointer mapping for IRQ handling
 * @cache_irq_mask:   array of IRQ enable masks reg storage created during init
 * @save_irq_status:  array of IRQ status reg storage created during init
 * @irq_lock:         spinlock for accessing IRQ resources
 * @irq_cb_tbl:       array of IRQ callbacks
 */
struct dpu_hw_intr {
	struct dpu_hw_blk_reg_map hw;
	u32 cache_irq_mask[MDP_INTR_MAX];
	u32 *save_irq_status;
	spinlock_t irq_lock;
	unsigned long irq_mask;
	const struct dpu_intr_reg *intr_set;

	struct dpu_hw_intr_entry irq_tbl[DPU_NUM_IRQS];
};

struct dpu_hw_intr *dpu_hw_intr_init(struct drm_device *dev,
				     void __iomem *addr,
				     const struct dpu_mdss_cfg *m);

#endif

Annotation

Implementation Notes