drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h
Extension
.h
Size
10505 bytes
Lines
393
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct dpu_hw_sharp_cfg {
	u32 strength;
	u32 edge_thr;
	u32 smooth_thr;
	u32 noise_thr;
};

struct dpu_hw_pixel_ext {
	/* scaling factors are enabled for this input layer */
	uint8_t enable_pxl_ext;

	int init_phase_x[DPU_MAX_PLANES];
	int phase_step_x[DPU_MAX_PLANES];
	int init_phase_y[DPU_MAX_PLANES];
	int phase_step_y[DPU_MAX_PLANES];

	/*
	 * Number of pixels extension in left, right, top and bottom direction
	 * for all color components. This pixel value for each color component
	 * should be sum of fetch + repeat pixels.
	 */
	int num_ext_pxls_left[DPU_MAX_PLANES];
	int num_ext_pxls_right[DPU_MAX_PLANES];
	int num_ext_pxls_top[DPU_MAX_PLANES];
	int num_ext_pxls_btm[DPU_MAX_PLANES];

	/*
	 * Number of pixels needs to be overfetched in left, right, top and
	 * bottom directions from source image for scaling.
	 */
	int left_ftch[DPU_MAX_PLANES];
	int right_ftch[DPU_MAX_PLANES];
	int top_ftch[DPU_MAX_PLANES];
	int btm_ftch[DPU_MAX_PLANES];

	/*
	 * Number of pixels needs to be repeated in left, right, top and
	 * bottom directions for scaling.
	 */
	int left_rpt[DPU_MAX_PLANES];
	int right_rpt[DPU_MAX_PLANES];
	int top_rpt[DPU_MAX_PLANES];
	int btm_rpt[DPU_MAX_PLANES];

	uint32_t roi_w[DPU_MAX_PLANES];
	uint32_t roi_h[DPU_MAX_PLANES];

	/*
	 * Filter type to be used for scaling in horizontal and vertical
	 * directions
	 */
	enum dpu_hw_filter horz_filter[DPU_MAX_PLANES];
	enum dpu_hw_filter vert_filter[DPU_MAX_PLANES];

};

/**
 * struct dpu_sw_pipe_cfg : software pipe configuration
 * @src_rect:  src ROI, caller takes into account the different operations
 *             such as decimation, flip etc to program this field
 * @dst_rect: destination ROI.
 * @rotation: simplified drm rotation hint
 */
struct dpu_sw_pipe_cfg {
	struct drm_rect src_rect;
	struct drm_rect dst_rect;
	unsigned int rotation;
};

/**
 * struct dpu_hw_pipe_ts_cfg - traffic shaper configuration
 * @size: size to prefill in bytes, or zero to disable
 * @time: time to prefill in usec, or zero to disable
 */
struct dpu_hw_pipe_ts_cfg {
	u64 size;
	u64 time;
};

/**
 * struct dpu_sw_pipe - software pipe description
 * @sspp:      backing SSPP pipe
 * @multirect_index:     index of the rectangle of SSPP
 * @multirect_mode:      parallel or time multiplex multirect mode
 */
struct dpu_sw_pipe {
	struct dpu_hw_sspp *sspp;
	enum dpu_sspp_multirect_index multirect_index;
	enum dpu_sspp_multirect_mode multirect_mode;
};

Annotation

Implementation Notes