drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.h- Extension
.h- Size
- 2966 bytes
- Lines
- 112
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
dpu_hw_catalog.hdpu_hw_mdss.hdpu_hw_util.h
Detected Declarations
struct dpu_hw_vbifstruct dpu_hw_vbif_opsstruct dpu_hw_vbif
Annotated Snippet
struct dpu_hw_vbif_ops {
/**
* @set_limit_conf: set transaction limit config
* @vbif: vbif context driver
* @xin_id: client interface identifier
* @rd: true for read limit; false for write limit
* @limit: outstanding transaction limit
*/
void (*set_limit_conf)(struct dpu_hw_vbif *vbif,
u32 xin_id, bool rd, u32 limit);
/**
* @get_limit_conf: get transaction limit config
* @vbif: vbif context driver
* @xin_id: client interface identifier
* @rd: true for read limit; false for write limit
* @return: outstanding transaction limit
*/
u32 (*get_limit_conf)(struct dpu_hw_vbif *vbif,
u32 xin_id, bool rd);
/**
* @set_halt_ctrl: set halt control
* @vbif: vbif context driver
* @xin_id: client interface identifier
* @enable: halt control enable
*/
void (*set_halt_ctrl)(struct dpu_hw_vbif *vbif,
u32 xin_id, bool enable);
/**
* @get_halt_ctrl: get halt control
* @vbif: vbif context driver
* @xin_id: client interface identifier
* @return: halt control enable
*/
bool (*get_halt_ctrl)(struct dpu_hw_vbif *vbif,
u32 xin_id);
/**
* @set_qos_remap: set QoS priority remap
* @vbif: vbif context driver
* @xin_id: client interface identifier
* @level: priority level
* @remap_level: remapped level
*/
void (*set_qos_remap)(struct dpu_hw_vbif *vbif,
u32 xin_id, u32 level, u32 remap_level);
/**
* @set_mem_type: set memory type
* @vbif: vbif context driver
* @xin_id: client interface identifier
* @value: memory type value
*/
void (*set_mem_type)(struct dpu_hw_vbif *vbif,
u32 xin_id, u32 value);
/**
* @clear_errors: clear any vbif errors
* This function clears any detected pending/source errors
* on the VBIF interface, and optionally returns the detected
* error mask(s).
* @vbif: vbif context driver
* @pnd_errors: pointer to pending error reporting variable
* @src_errors: pointer to source error reporting variable
*/
void (*clear_errors)(struct dpu_hw_vbif *vbif,
u32 *pnd_errors, u32 *src_errors);
/**
* @set_write_gather_en: set write_gather enable
* @vbif: vbif context driver
* @xin_id: client interface identifier
*/
void (*set_write_gather_en)(struct dpu_hw_vbif *vbif, u32 xin_id);
};
struct dpu_hw_vbif {
/* base */
struct dpu_hw_blk_reg_map hw;
/* vbif */
const struct dpu_vbif_cfg *cap;
/* ops */
struct dpu_hw_vbif_ops ops;
};
struct dpu_hw_vbif *dpu_hw_vbif_init(struct drm_device *dev,
Annotation
- Immediate include surface: `dpu_hw_catalog.h`, `dpu_hw_mdss.h`, `dpu_hw_util.h`.
- Detected declarations: `struct dpu_hw_vbif`, `struct dpu_hw_vbif_ops`, `struct dpu_hw_vbif`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.