drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/msm/disp/dpu1/dpu_writeback.c- Extension
.c- Size
- 4398 bytes
- Lines
- 146
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
drm/drm_edid.hdrm/drm_framebuffer.hdrm/drm_managed.hdpu_writeback.h
Detected Declarations
function Copyrightfunction dpu_wb_conn_atomic_checkfunction dpu_wb_conn_prepare_jobfunction dpu_wb_conn_cleanup_jobfunction dpu_writeback_init
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <drm/drm_edid.h>
#include <drm/drm_framebuffer.h>
#include <drm/drm_managed.h>
#include "dpu_writeback.h"
static int dpu_wb_conn_get_modes(struct drm_connector *connector)
{
struct drm_device *dev = connector->dev;
struct msm_drm_private *priv = dev->dev_private;
struct dpu_kms *dpu_kms = to_dpu_kms(priv->kms);
/*
* We should ideally be limiting the modes only to the maxlinewidth but
* on some chipsets this will allow even 4k modes to be added which will
* fail the per SSPP bandwidth checks. So, till we have dual-SSPP support
* and source split support added lets limit the modes based on max_mixer_width
* as 4K modes can then be supported.
*/
return drm_add_modes_noedid(connector, dpu_kms->catalog->caps->max_mixer_width,
dev->mode_config.max_height);
}
static int dpu_wb_conn_atomic_check(struct drm_connector *connector,
struct drm_atomic_commit *state)
{
struct drm_writeback_connector *wb_conn = drm_connector_to_writeback(connector);
struct dpu_wb_connector *dpu_wb_conn = to_dpu_wb_conn(wb_conn);
struct drm_connector_state *conn_state =
drm_atomic_get_new_connector_state(state, connector);
struct drm_crtc *crtc;
struct drm_crtc_state *crtc_state;
const struct drm_display_mode *mode;
struct drm_framebuffer *fb;
DPU_DEBUG("[atomic_check:%d]\n", connector->base.id);
if (!conn_state || !conn_state->connector) {
DPU_ERROR("invalid connector state\n");
return -EINVAL;
}
crtc = conn_state->crtc;
if (!crtc)
return 0;
if (!conn_state->writeback_job || !conn_state->writeback_job->fb)
return 0;
crtc_state = drm_atomic_get_crtc_state(state, crtc);
if (IS_ERR(crtc_state))
return PTR_ERR(crtc_state);
mode = &crtc_state->mode;
fb = conn_state->writeback_job->fb;
DPU_DEBUG("[fb_id:%u][fb:%u,%u][mode:\"%s\":%ux%u]\n", fb->base.id, fb->width, fb->height,
mode->name, mode->hdisplay, mode->vdisplay);
if (fb->width != mode->hdisplay) {
DPU_ERROR("invalid fb w=%d, mode w=%d\n", fb->width, mode->hdisplay);
return -EINVAL;
} else if (fb->height != mode->vdisplay) {
DPU_ERROR("invalid fb h=%d, mode h=%d\n", fb->height, mode->vdisplay);
return -EINVAL;
} else if (fb->width > dpu_wb_conn->maxlinewidth) {
DPU_ERROR("invalid fb w=%d, maxlinewidth=%u\n",
fb->width, dpu_wb_conn->maxlinewidth);
return -EINVAL;
} else if (fb->modifier != DRM_FORMAT_MOD_LINEAR) {
DPU_ERROR("unsupported fb modifier:%#llx\n", fb->modifier);
return -EINVAL;
}
return drm_atomic_helper_check_wb_connector_state(conn_state->connector, conn_state->state);
}
static const struct drm_connector_funcs dpu_wb_conn_funcs = {
.reset = drm_atomic_helper_connector_reset,
.fill_modes = drm_helper_probe_single_connector_modes,
.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
};
Annotation
- Immediate include surface: `drm/drm_edid.h`, `drm/drm_framebuffer.h`, `drm/drm_managed.h`, `dpu_writeback.h`.
- Detected declarations: `function Copyright`, `function dpu_wb_conn_atomic_check`, `function dpu_wb_conn_prepare_job`, `function dpu_wb_conn_cleanup_job`, `function dpu_writeback_init`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.