drivers/gpu/drm/msm/disp/mdp_format.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/msm/disp/mdp_format.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/msm/disp/mdp_format.c- Extension
.c- Size
- 26663 bytes
- Lines
- 660
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
drm/drm_fourcc.hdrm/drm_framebuffer.hmsm_drv.hmdp_kms.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2014 The Linux Foundation. All rights reserved.
* Copyright (C) 2013 Red Hat
* Author: Rob Clark <robdclark@gmail.com>
*/
#include <drm/drm_fourcc.h>
#include <drm/drm_framebuffer.h>
#include "msm_drv.h"
#include "mdp_kms.h"
static struct csc_cfg csc_convert[CSC_MAX] = {
[CSC_RGB2RGB] = {
.type = CSC_RGB2RGB,
.matrix = {
0x0200, 0x0000, 0x0000,
0x0000, 0x0200, 0x0000,
0x0000, 0x0000, 0x0200
},
.pre_bias = { 0x0, 0x0, 0x0 },
.post_bias = { 0x0, 0x0, 0x0 },
.pre_clamp = { 0x0, 0xff, 0x0, 0xff, 0x0, 0xff },
.post_clamp = { 0x0, 0xff, 0x0, 0xff, 0x0, 0xff },
},
[CSC_YUV2RGB] = {
.type = CSC_YUV2RGB,
.matrix = {
0x0254, 0x0000, 0x0331,
0x0254, 0xff37, 0xfe60,
0x0254, 0x0409, 0x0000
},
.pre_bias = { 0xfff0, 0xff80, 0xff80 },
.post_bias = { 0x00, 0x00, 0x00 },
.pre_clamp = { 0x00, 0xff, 0x00, 0xff, 0x00, 0xff },
.post_clamp = { 0x00, 0xff, 0x00, 0xff, 0x00, 0xff },
},
[CSC_RGB2YUV] = {
.type = CSC_RGB2YUV,
.matrix = {
0x0083, 0x0102, 0x0032,
0x1fb5, 0x1f6c, 0x00e1,
0x00e1, 0x1f45, 0x1fdc
},
.pre_bias = { 0x00, 0x00, 0x00 },
.post_bias = { 0x10, 0x80, 0x80 },
.pre_clamp = { 0x00, 0xff, 0x00, 0xff, 0x00, 0xff },
.post_clamp = { 0x10, 0xeb, 0x10, 0xf0, 0x10, 0xf0 },
},
[CSC_YUV2YUV] = {
.type = CSC_YUV2YUV,
.matrix = {
0x0200, 0x0000, 0x0000,
0x0000, 0x0200, 0x0000,
0x0000, 0x0000, 0x0200
},
.pre_bias = { 0x00, 0x00, 0x00 },
.post_bias = { 0x00, 0x00, 0x00 },
.pre_clamp = { 0x00, 0xff, 0x00, 0xff, 0x00, 0xff },
.post_clamp = { 0x00, 0xff, 0x00, 0xff, 0x00, 0xff },
},
};
#define MDP_TILE_HEIGHT_DEFAULT 1
#define MDP_TILE_HEIGHT_UBWC 4
#define MDP_TILE_HEIGHT_NV12 8
#define INTERLEAVED_RGB_FMT(fmt, bp, r, g, b, e0, e1, e2) \
{ \
.pixel_format = DRM_FORMAT_ ## fmt, \
.fetch_type = MDP_PLANE_INTERLEAVED, \
.alpha_enable = false, \
.element = { (e0), (e1), (e2), 0 }, \
.bpc_g_y = g, \
.bpc_b_cb = b, \
.bpc_r_cr = r, \
.bpc_a = 0, \
.chroma_sample = CHROMA_FULL, \
.unpack_count = 3, \
.bpp = bp, \
.fetch_mode = MDP_FETCH_LINEAR, \
.flags = MSM_FORMAT_FLAG_UNPACK_TIGHT, \
.num_planes = 1, \
.tile_height = MDP_TILE_HEIGHT_DEFAULT \
}
#define INTERLEAVED_RGBA_FMT(fmt, bp, a, r, g, b, e0, e1, e2, e3) \
{ \
.pixel_format = DRM_FORMAT_ ## fmt, \
Annotation
- Immediate include surface: `drm/drm_fourcc.h`, `drm/drm_framebuffer.h`, `msm_drv.h`, `mdp_kms.h`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.