drivers/gpu/drm/msm/dp/dp_ctrl.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/msm/dp/dp_ctrl.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/msm/dp/dp_ctrl.c- Extension
.c- Size
- 74923 bytes
- Lines
- 2763
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/types.hlinux/clk.hlinux/completion.hlinux/delay.hlinux/iopoll.hlinux/phy/phy.hlinux/phy/phy-dp.hlinux/pm_opp.hlinux/rational.hlinux/string_choices.hdrm/display/drm_dp_helper.hdrm/drm_device.hdrm/drm_fixed.hdrm/drm_print.hdp_reg.hdp_ctrl.hdp_link.h
Detected Declarations
struct msm_dp_tu_calc_inputstruct msm_dp_vc_tu_mapping_tablestruct msm_dp_ctrl_privatestruct tu_algo_datafunction msm_dp_read_ahbfunction msm_dp_write_ahbfunction msm_dp_read_linkfunction msm_dp_write_linkfunction msm_dp_aux_link_configurefunction msm_dp_ctrl_resetfunction msm_dp_ctrl_get_aux_interruptfunction msm_dp_ctrl_get_interruptfunction msm_dp_ctrl_enable_irqfunction msm_dp_ctrl_disable_irqfunction msm_dp_ctrl_get_psr_interruptfunction msm_dp_ctrl_config_psr_interruptfunction msm_dp_ctrl_psr_mainlink_enablefunction msm_dp_ctrl_psr_mainlink_disablefunction msm_dp_ctrl_mainlink_enablefunction msm_dp_ctrl_mainlink_disablefunction msm_dp_setup_peripheral_flushfunction msm_dp_ctrl_mainlink_readyfunction msm_dp_ctrl_push_idlefunction msm_dp_ctrl_config_ctrlfunction msm_dp_ctrl_lane_mappingfunction msm_dp_ctrl_configure_source_paramsfunction _tu_param_comparefunction msm_dp_panel_update_tu_timingsfunction _tu_valid_boundary_calcfunction _dp_ctrl_calc_tufunction msm_dp_ctrl_calc_tu_parametersfunction msm_dp_ctrl_setup_tr_unitfunction msm_dp_ctrl_wait4video_readyfunction msm_dp_ctrl_set_vx_pxfunction msm_dp_ctrl_update_phy_vx_pxfunction msm_dp_ctrl_train_pattern_setfunction msm_dp_ctrl_set_pattern_state_bitfunction msm_dp_ctrl_link_train_1function msm_dp_ctrl_link_rate_down_shiftfunction msm_dp_ctrl_link_lane_down_shiftfunction msm_dp_ctrl_clear_training_patternfunction msm_dp_ctrl_link_train_2function msm_dp_ctrl_link_train_1_2function msm_dp_ctrl_link_trainfunction msm_dp_ctrl_setup_main_linkfunction msm_dp_ctrl_core_clk_enablefunction msm_dp_ctrl_core_clk_disablefunction msm_dp_ctrl_link_clk_enable
Annotated Snippet
struct msm_dp_tu_calc_input {
u64 lclk; /* 162, 270, 540 and 810 */
u64 pclk_khz; /* in KHz */
u64 hactive; /* active h-width */
u64 hporch; /* bp + fp + pulse */
int nlanes; /* no.of.lanes */
int bpp; /* bits */
int pixel_enc; /* 444, 420, 422 */
int dsc_en; /* dsc on/off */
int async_en; /* async mode */
int fec_en; /* fec */
int compress_ratio; /* 2:1 = 200, 3:1 = 300, 3.75:1 = 375 */
int num_of_dsc_slices; /* number of slices per line */
};
struct msm_dp_vc_tu_mapping_table {
u32 vic;
u8 lanes;
u8 lrate; /* DP_LINK_RATE -> 162(6), 270(10), 540(20), 810 (30) */
u8 bpp;
u8 valid_boundary_link;
u16 delay_start_link;
bool boundary_moderation_en;
u8 valid_lower_boundary_link;
u8 upper_boundary_count;
u8 lower_boundary_count;
u8 tu_size_minus1;
};
struct msm_dp_ctrl_private {
struct msm_dp_ctrl msm_dp_ctrl;
struct drm_device *drm_dev;
struct device *dev;
struct drm_dp_aux *aux;
struct msm_dp_panel *panel;
struct msm_dp_link *link;
void __iomem *ahb_base;
void __iomem *link_base;
struct phy *phy;
unsigned int num_core_clks;
struct clk_bulk_data *core_clks;
unsigned int num_link_clks;
struct clk_bulk_data *link_clks;
struct clk *pixel_clk;
union phy_configure_opts phy_opts;
struct completion idle_comp;
struct completion psr_op_comp;
struct completion video_comp;
u32 hw_revision;
bool core_clks_on;
bool link_clks_on;
bool stream_clks_on;
};
static inline u32 msm_dp_read_ahb(const struct msm_dp_ctrl_private *ctrl, u32 offset)
{
return readl_relaxed(ctrl->ahb_base + offset);
}
static inline void msm_dp_write_ahb(struct msm_dp_ctrl_private *ctrl,
u32 offset, u32 data)
{
/*
* To make sure phy reg writes happens before any other operation,
* this function uses writel() instread of writel_relaxed()
*/
writel(data, ctrl->ahb_base + offset);
}
static inline u32 msm_dp_read_link(struct msm_dp_ctrl_private *ctrl, u32 offset)
{
return readl_relaxed(ctrl->link_base + offset);
}
static inline void msm_dp_write_link(struct msm_dp_ctrl_private *ctrl,
u32 offset, u32 data)
{
/*
* To make sure link reg writes happens before any other operation,
* this function uses writel() instread of writel_relaxed()
*/
writel(data, ctrl->link_base + offset);
Annotation
- Immediate include surface: `linux/types.h`, `linux/clk.h`, `linux/completion.h`, `linux/delay.h`, `linux/iopoll.h`, `linux/phy/phy.h`, `linux/phy/phy-dp.h`, `linux/pm_opp.h`.
- Detected declarations: `struct msm_dp_tu_calc_input`, `struct msm_dp_vc_tu_mapping_table`, `struct msm_dp_ctrl_private`, `struct tu_algo_data`, `function msm_dp_read_ahb`, `function msm_dp_write_ahb`, `function msm_dp_read_link`, `function msm_dp_write_link`, `function msm_dp_aux_link_configure`, `function msm_dp_ctrl_reset`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.