drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/msm/dsi/phy/dsi_phy.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/msm/dsi/phy/dsi_phy.c- Extension
.c- Size
- 25833 bytes
- Lines
- 872
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk-provider.hlinux/platform_device.hlinux/pm_clock.hlinux/pm_runtime.hdt-bindings/phy/phy.hdsi_phy.h
Detected Declarations
function Copyrightfunction dsi_dphy_timing_calc_clk_zerofunction msm_dsi_dphy_timing_calcfunction msm_dsi_dphy_timing_calc_v2function msm_dsi_dphy_timing_calc_v3function msm_dsi_dphy_timing_calc_v4function msm_dsi_cphy_timing_calc_v4function dsi_phy_get_idfunction dsi_phy_driver_probefunction msm_dsi_phy_driver_registerfunction msm_dsi_phy_driver_unregisterfunction msm_dsi_phy_enablefunction msm_dsi_phy_disablefunction msm_dsi_phy_set_usecasefunction msm_dsi_phy_set_continuous_clockfunction msm_dsi_phy_pll_save_statefunction msm_dsi_phy_pll_restore_statefunction msm_dsi_phy_snapshot
Annotated Snippet
if (ret) {
DRM_DEV_ERROR(dev, "%s: failed to restore phy state, %d\n",
__func__, ret);
goto pll_restor_fail;
}
}
return 0;
pll_restor_fail:
if (phy->cfg->ops.disable)
phy->cfg->ops.disable(phy);
phy_en_fail:
regulator_bulk_disable(phy->cfg->num_regulators, phy->supplies);
reg_en_fail:
pm_runtime_put(dev);
res_en_fail:
return ret;
}
void msm_dsi_phy_disable(struct msm_dsi_phy *phy)
{
if (!phy || !phy->cfg->ops.disable)
return;
phy->cfg->ops.disable(phy);
regulator_bulk_disable(phy->cfg->num_regulators, phy->supplies);
pm_runtime_put(&phy->pdev->dev);
}
void msm_dsi_phy_set_usecase(struct msm_dsi_phy *phy,
enum msm_dsi_phy_usecase uc)
{
if (phy)
phy->usecase = uc;
}
/* Returns true if we have to clear DSI_LANE_CTRL.HS_REQ_SEL_PHY */
bool msm_dsi_phy_set_continuous_clock(struct msm_dsi_phy *phy, bool enable)
{
if (!phy || !phy->cfg->ops.set_continuous_clock)
return false;
return phy->cfg->ops.set_continuous_clock(phy, enable);
}
void msm_dsi_phy_pll_save_state(struct msm_dsi_phy *phy)
{
if (phy->cfg->ops.save_pll_state) {
phy->cfg->ops.save_pll_state(phy);
phy->state_saved = true;
}
}
int msm_dsi_phy_pll_restore_state(struct msm_dsi_phy *phy)
{
int ret;
if (phy->cfg->ops.restore_pll_state && phy->state_saved) {
ret = phy->cfg->ops.restore_pll_state(phy);
if (ret)
return ret;
phy->state_saved = false;
}
return 0;
}
void msm_dsi_phy_snapshot(struct msm_disp_state *disp_state, struct msm_dsi_phy *phy)
{
msm_disp_snapshot_add_block(disp_state,
phy->base_size, phy->base,
"dsi%d_phy", phy->id);
/* Do not try accessing PLL registers if it is switched off */
if (phy->pll_on)
msm_disp_snapshot_add_block(disp_state,
phy->pll_size, phy->pll_base,
"dsi%d_pll", phy->id);
if (phy->lane_base)
msm_disp_snapshot_add_block(disp_state,
phy->lane_size, phy->lane_base,
"dsi%d_lane", phy->id);
if (phy->reg_base)
msm_disp_snapshot_add_block(disp_state,
phy->reg_size, phy->reg_base,
Annotation
- Immediate include surface: `linux/clk-provider.h`, `linux/platform_device.h`, `linux/pm_clock.h`, `linux/pm_runtime.h`, `dt-bindings/phy/phy.h`, `dsi_phy.h`.
- Detected declarations: `function Copyright`, `function dsi_dphy_timing_calc_clk_zero`, `function msm_dsi_dphy_timing_calc`, `function msm_dsi_dphy_timing_calc_v2`, `function msm_dsi_dphy_timing_calc_v3`, `function msm_dsi_dphy_timing_calc_v4`, `function msm_dsi_cphy_timing_calc_v4`, `function dsi_phy_get_id`, `function dsi_phy_driver_probe`, `function msm_dsi_phy_driver_register`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.