drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/msm/hdmi/hdmi_hdcp.c- Extension
.c- Size
- 36639 bytes
- Lines
- 1429
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
hdmi.hlinux/firmware/qcom/qcom_scm.h
Detected Declarations
struct hdmi_hdcp_reg_datastruct hdmi_hdcp_ctrlenum DS_TYPEenum hdmi_hdcp_statefunction msm_hdmi_ddc_readfunction msm_hdmi_ddc_writefunction msm_hdmi_hdcp_scm_wrfunction msm_hdmi_hdcp_irqfunction msm_hdmi_hdcp_msleepfunction msm_hdmi_hdcp_read_validate_aksvfunction msm_reset_hdcp_ddc_failuresfunction msm_hdmi_hdcp_hw_ddc_cleanfunction msm_hdmi_hdcp_reauth_workfunction msm_hdmi_hdcp_auth_preparefunction msm_hdmi_hdcp_auth_failfunction msm_hdmi_hdcp_auth_donefunction msm_hdmi_hdcp_wait_key_an_readyfunction msm_hdmi_hdcp_send_aksv_anfunction msm_hdmi_hdcp_recv_bksvfunction msm_hdmi_hdcp_recv_bcapsfunction msm_hdmi_hdcp_auth_part1_key_exchangefunction msm_hdmi_hdcp_auth_part1_recv_r0function msm_hdmi_hdcp_auth_part1_verify_r0function msm_hdmi_hdcp_recv_check_bstatusfunction msm_hdmi_hdcp_auth_part2_wait_ksv_fifo_readyfunction msm_hdmi_hdcp_transfer_v_hfunction msm_hdmi_hdcp_recv_ksv_fifofunction msm_hdmi_hdcp_reset_sha_enginefunction msm_hdmi_hdcp_auth_part2_recv_ksv_fifofunction msm_hdmi_hdcp_write_ksv_fifofunction msm_hdmi_hdcp_auth_part2_write_ksv_fifofunction msm_hdmi_hdcp_auth_part2_check_v_matchfunction msm_hdmi_hdcp_auth_workfunction msm_hdmi_hdcp_onfunction msm_hdmi_hdcp_offfunction msm_hdmi_hdcp_destroy
Annotated Snippet
struct hdmi_hdcp_reg_data {
u32 reg_id;
u32 off;
char *name;
u32 reg_val;
};
struct hdmi_hdcp_ctrl {
struct hdmi *hdmi;
u32 auth_retries;
bool tz_hdcp;
enum hdmi_hdcp_state hdcp_state;
struct work_struct hdcp_auth_work;
struct work_struct hdcp_reauth_work;
#define AUTH_ABORT_EV 1
#define AUTH_RESULT_RDY_EV 2
unsigned long auth_event;
wait_queue_head_t auth_event_queue;
u32 ksv_fifo_w_index;
/*
* store aksv from qfprom
*/
u32 aksv_lsb;
u32 aksv_msb;
bool aksv_valid;
u32 ds_type;
u32 bksv_lsb;
u32 bksv_msb;
u8 dev_count;
u8 depth;
u8 ksv_list[5 * 127];
bool max_cascade_exceeded;
bool max_dev_exceeded;
};
static int msm_hdmi_ddc_read(struct hdmi *hdmi, u16 addr, u8 offset,
u8 *data, u16 data_len)
{
int rc;
int retry = 5;
struct i2c_msg msgs[] = {
{
.addr = addr >> 1,
.flags = 0,
.len = 1,
.buf = &offset,
}, {
.addr = addr >> 1,
.flags = I2C_M_RD,
.len = data_len,
.buf = data,
}
};
DBG("Start DDC read");
retry:
rc = i2c_transfer(hdmi->i2c, msgs, 2);
retry--;
if (rc == 2)
rc = 0;
else if (retry > 0)
goto retry;
else
rc = -EIO;
DBG("End DDC read %d", rc);
return rc;
}
#define HDCP_DDC_WRITE_MAX_BYTE_NUM 32
static int msm_hdmi_ddc_write(struct hdmi *hdmi, u16 addr, u8 offset,
u8 *data, u16 data_len)
{
int rc;
int retry = 10;
u8 buf[HDCP_DDC_WRITE_MAX_BYTE_NUM];
struct i2c_msg msgs[] = {
{
.addr = addr >> 1,
.flags = 0,
.len = 1,
}
};
DBG("Start DDC write");
Annotation
- Immediate include surface: `hdmi.h`, `linux/firmware/qcom/qcom_scm.h`.
- Detected declarations: `struct hdmi_hdcp_reg_data`, `struct hdmi_hdcp_ctrl`, `enum DS_TYPE`, `enum hdmi_hdcp_state`, `function msm_hdmi_ddc_read`, `function msm_hdmi_ddc_write`, `function msm_hdmi_hdcp_scm_wr`, `function msm_hdmi_hdcp_irq`, `function msm_hdmi_hdcp_msleep`, `function msm_hdmi_hdcp_read_validate_aksv`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.