drivers/gpu/drm/msm/msm_ringbuffer.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/msm/msm_ringbuffer.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/msm/msm_ringbuffer.c
Extension
.c
Size
3190 bytes
Lines
143
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2013 Red Hat
 * Author: Rob Clark <robdclark@gmail.com>
 */

#include "msm_ringbuffer.h"
#include "msm_gpu.h"

static uint num_hw_submissions = 8;
MODULE_PARM_DESC(num_hw_submissions, "The max # of jobs to write into ringbuffer (default 8)");
module_param(num_hw_submissions, uint, 0600);

static struct dma_fence *msm_job_run(struct drm_sched_job *job)
{
	struct msm_gem_submit *submit = to_msm_submit(job);
	struct msm_fence_context *fctx = submit->ring->fctx;
	struct msm_gpu *gpu = submit->gpu;
	struct drm_device *dev = gpu->dev;
	unsigned nr_cmds = submit->nr_cmds;
	int i;

	msm_fence_init(submit->hw_fence, fctx);

	mutex_lock(&dev->gem_lru_mutex);

	for (i = 0; i < submit->nr_bos; i++) {
		struct drm_gem_object *obj = submit->bos[i].obj;

		msm_gem_unpin_active(obj);
	}

	submit->bos_pinned = false;

	mutex_unlock(&dev->gem_lru_mutex);

	/* TODO move submit path over to using a per-ring lock.. */
	mutex_lock(&gpu->lock);

	if (submit->queue->ctx->closed)
		submit->nr_cmds = 0;

	msm_gpu_submit(gpu, submit);

	submit->nr_cmds = nr_cmds;

	mutex_unlock(&gpu->lock);

	return dma_fence_get(submit->hw_fence);
}

static void msm_job_free(struct drm_sched_job *job)
{
	struct msm_gem_submit *submit = to_msm_submit(job);

	drm_sched_job_cleanup(job);
	msm_gem_submit_put(submit);
}

static const struct drm_sched_backend_ops msm_sched_ops = {
	.run_job = msm_job_run,
	.free_job = msm_job_free
};

struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id,
		void *memptrs, uint64_t memptrs_iova)
{
	struct drm_sched_init_args args = {
		.ops = &msm_sched_ops,
		.credit_limit = num_hw_submissions,
		.timeout = MAX_SCHEDULE_TIMEOUT,
		.dev = gpu->dev->dev,
	};
	struct msm_ringbuffer *ring;
	char name[32];
	int ret;

	/* We assume everywhere that MSM_GPU_RINGBUFFER_SZ is a power of 2 */
	BUILD_BUG_ON(!is_power_of_2(MSM_GPU_RINGBUFFER_SZ));

	ring = kzalloc_obj(*ring);
	if (!ring) {
		ret = -ENOMEM;
		goto fail;
	}

	ring->gpu = gpu;
	ring->id = id;

	ring->start = msm_gem_kernel_new(gpu->dev, MSM_GPU_RINGBUFFER_SZ,

Annotation

Implementation Notes