drivers/gpu/drm/msm/registers/adreno/a3xx.xml
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/msm/registers/adreno/a3xx.xml
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/msm/registers/adreno/a3xx.xml- Extension
.xml- Size
- 84204 bytes
- Lines
- 1748
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: drivers/gpu
- Status
- atlas-only
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
<?xml version="1.0" encoding="UTF-8"?>
<database xmlns="http://nouveau.freedesktop.org/"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
<import file="freedreno_copyright.xml"/>
<import file="adreno/adreno_common.xml"/>
<import file="adreno/adreno_pm4.xml"/>
<enum name="a3xx_tile_mode">
<value name="LINEAR" value="0"/>
<value name="TILE_4X4" value="1"/> <!-- "normal" case for textures -->
<value name="TILE_32X32" value="2"/> <!-- only used in GMEM -->
<value name="TILE_4X2" value="3"/> <!-- only used for CrCb -->
</enum>
<enum name="a3xx_state_block_id">
<value name="HLSQ_BLOCK_ID_TP_TEX" value="2"/>
<value name="HLSQ_BLOCK_ID_TP_MIPMAP" value="3"/>
<value name="HLSQ_BLOCK_ID_SP_VS" value="4"/>
<value name="HLSQ_BLOCK_ID_SP_FS" value="6"/>
</enum>
<enum name="a3xx_cache_opcode">
<value name="INVALIDATE" value="1"/>
</enum>
<enum name="a3xx_vtx_fmt">
<value name="VFMT_32_FLOAT" value="0x0"/>
<value name="VFMT_32_32_FLOAT" value="0x1"/>
<value name="VFMT_32_32_32_FLOAT" value="0x2"/>
<value name="VFMT_32_32_32_32_FLOAT" value="0x3"/>
<value name="VFMT_16_FLOAT" value="0x4"/>
<value name="VFMT_16_16_FLOAT" value="0x5"/>
<value name="VFMT_16_16_16_FLOAT" value="0x6"/>
<value name="VFMT_16_16_16_16_FLOAT" value="0x7"/>
<value name="VFMT_32_FIXED" value="0x8"/>
<value name="VFMT_32_32_FIXED" value="0x9"/>
<value name="VFMT_32_32_32_FIXED" value="0xa"/>
<value name="VFMT_32_32_32_32_FIXED" value="0xb"/>
<value name="VFMT_16_SINT" value="0x10"/>
<value name="VFMT_16_16_SINT" value="0x11"/>
<value name="VFMT_16_16_16_SINT" value="0x12"/>
<value name="VFMT_16_16_16_16_SINT" value="0x13"/>
<value name="VFMT_16_UINT" value="0x14"/>
<value name="VFMT_16_16_UINT" value="0x15"/>
<value name="VFMT_16_16_16_UINT" value="0x16"/>
<value name="VFMT_16_16_16_16_UINT" value="0x17"/>
<value name="VFMT_16_SNORM" value="0x18"/>
<value name="VFMT_16_16_SNORM" value="0x19"/>
<value name="VFMT_16_16_16_SNORM" value="0x1a"/>
<value name="VFMT_16_16_16_16_SNORM" value="0x1b"/>
<value name="VFMT_16_UNORM" value="0x1c"/>
<value name="VFMT_16_16_UNORM" value="0x1d"/>
<value name="VFMT_16_16_16_UNORM" value="0x1e"/>
<value name="VFMT_16_16_16_16_UNORM" value="0x1f"/>
<!-- seems to be no NORM variants for 32bit.. -->
<value name="VFMT_32_UINT" value="0x20"/>
<value name="VFMT_32_32_UINT" value="0x21"/>
<value name="VFMT_32_32_32_UINT" value="0x22"/>
<value name="VFMT_32_32_32_32_UINT" value="0x23"/>
<value name="VFMT_32_SINT" value="0x24"/>
<value name="VFMT_32_32_SINT" value="0x25"/>
<value name="VFMT_32_32_32_SINT" value="0x26"/>
<value name="VFMT_32_32_32_32_SINT" value="0x27"/>
<value name="VFMT_8_UINT" value="0x28"/>
Annotation
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: atlas-only.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.