drivers/gpu/drm/msm/registers/adreno/a5xx_perfcntrs.json

File Facts

System

Linux kernel

Corpus path

drivers/gpu/drm/msm/registers/adreno/a5xx_perfcntrs.json

Extension

.json

Size

4361 bytes

Lines

129

Domain

Driver Families

Bucket

drivers/gpu

Inferred role

Driver Families: configuration, schema, or hardware description

Status

atlas-only

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

• No C-style include directives detected by the generator.

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

{
    "chip": "A5XX",
    "groups": [
        {
            "name": "CP",
            "num": 8,
            "reserved": [ 0 ],
            "select": "CP_PERFCTR_CP_SEL_{}",
            "counter_lo": "RBBM_PERFCTR_CP_{}_LO",
            "counter_hi": "RBBM_PERFCTR_CP_{}_HI",
            "countable_type": "a5xx_cp_perfcounter_select"
        },
        {
            "name": "CCU",
            "num": 4,
            "select": "RB_PERFCTR_CCU_SEL_{}",
            "counter_lo": "RBBM_PERFCTR_CCU_{}_LO",
            "counter_hi": "RBBM_PERFCTR_CCU_{}_HI",
            "countable_type": "a5xx_ccu_perfcounter_select"
        },
        {
            "name": "TSE",
            "num": 4,
            "select": "GRAS_PERFCTR_TSE_SEL_{}",
            "counter_lo": "RBBM_PERFCTR_TSE_{}_LO",
            "counter_hi": "RBBM_PERFCTR_TSE_{}_HI",
            "countable_type": "a5xx_tse_perfcounter_select"
        },
        {
            "name": "RAS",
            "num": 4,
            "select": "GRAS_PERFCTR_RAS_SEL_{}",
            "counter_lo": "RBBM_PERFCTR_RAS_{}_LO",
            "counter_hi": "RBBM_PERFCTR_RAS_{}_HI",
            "countable_type": "a5xx_ras_perfcounter_select"
        },
        {
            "name": "LRZ",
            "num": 4,
            "select": "GRAS_PERFCTR_LRZ_SEL_{}",
            "counter_lo": "RBBM_PERFCTR_LRZ_{}_LO",
            "counter_hi": "RBBM_PERFCTR_LRZ_{}_HI",
            "countable_type": "a5xx_lrz_perfcounter_select"
        },
        {
            "name": "HLSQ",
            "num": 8,
            "select": "HLSQ_PERFCTR_HLSQ_SEL_{}",
            "counter_lo": "RBBM_PERFCTR_HLSQ_{}_LO",
            "counter_hi": "RBBM_PERFCTR_HLSQ_{}_HI",
            "countable_type": "a5xx_hlsq_perfcounter_select"
        },
        {
            "name": "PC",
            "num": 8,
            "select": "PC_PERFCTR_PC_SEL_{}",
            "counter_lo": "RBBM_PERFCTR_PC_{}_LO",
            "counter_hi": "RBBM_PERFCTR_PC_{}_HI",
            "countable_type": "a5xx_pc_perfcounter_select"
        },
        {
            "name": "RB",
            "num": 8,
            "select": "RB_PERFCTR_RB_SEL_{}",
            "counter_lo": "RBBM_PERFCTR_RB_{}_LO",
            "counter_hi": "RBBM_PERFCTR_RB_{}_HI",
            "countable_type": "a5xx_rb_perfcounter_select"
        },
        {
            "name": "RBBM",

Annotation

• Atlas domain: Driver Families / drivers/gpu.
• Implementation status: atlas-only.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.