drivers/gpu/drm/msm/registers/display/dsi.xml
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/msm/registers/display/dsi.xml
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/msm/registers/display/dsi.xml- Extension
.xml- Size
- 19022 bytes
- Lines
- 394
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: drivers/gpu
- Status
- atlas-only
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
<?xml version="1.0" encoding="UTF-8"?>
<database xmlns="http://nouveau.freedesktop.org/"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
<import file="freedreno_copyright.xml"/>
<domain name="DSI" width="32">
<enum name="dsi_traffic_mode">
<value name="NON_BURST_SYNCH_PULSE" value="0"/>
<value name="NON_BURST_SYNCH_EVENT" value="1"/>
<value name="BURST_MODE" value="2"/>
</enum>
<enum name="dsi_vid_dst_format">
<value name="VID_DST_FORMAT_RGB565" value="0"/>
<value name="VID_DST_FORMAT_RGB666" value="1"/>
<value name="VID_DST_FORMAT_RGB666_LOOSE" value="2"/>
<value name="VID_DST_FORMAT_RGB888" value="3"/>
<value name="VID_DST_FORMAT_RGB101010" value="4"/>
</enum>
<enum name="dsi_rgb_swap">
<value name="SWAP_RGB" value="0"/>
<value name="SWAP_RBG" value="1"/>
<value name="SWAP_BGR" value="2"/>
<value name="SWAP_BRG" value="3"/>
<value name="SWAP_GRB" value="4"/>
<value name="SWAP_GBR" value="5"/>
</enum>
<enum name="dsi_cmd_trigger">
<value name="TRIGGER_NONE" value="0"/>
<value name="TRIGGER_SEOF" value="1"/>
<value name="TRIGGER_TE" value="2"/>
<value name="TRIGGER_SW" value="4"/>
<value name="TRIGGER_SW_SEOF" value="5"/>
<value name="TRIGGER_SW_TE" value="6"/>
</enum>
<enum name="dsi_cmd_dst_format">
<value name="CMD_DST_FORMAT_RGB111" value="0"/>
<value name="CMD_DST_FORMAT_RGB332" value="3"/>
<value name="CMD_DST_FORMAT_RGB444" value="4"/>
<value name="CMD_DST_FORMAT_RGB565" value="6"/>
<value name="CMD_DST_FORMAT_RGB666" value="7"/>
<value name="CMD_DST_FORMAT_RGB888" value="8"/>
<value name="CMD_DST_FORMAT_RGB101010" value="9"/>
</enum>
<enum name="dsi_lane_swap">
<value name="LANE_SWAP_0123" value="0"/>
<value name="LANE_SWAP_3012" value="1"/>
<value name="LANE_SWAP_2301" value="2"/>
<value name="LANE_SWAP_1230" value="3"/>
<value name="LANE_SWAP_0321" value="4"/>
<value name="LANE_SWAP_1032" value="5"/>
<value name="LANE_SWAP_2103" value="6"/>
<value name="LANE_SWAP_3210" value="7"/>
</enum>
<enum name="video_config_bpp">
<value name="VIDEO_CONFIG_18BPP" value="0"/>
<value name="VIDEO_CONFIG_24BPP" value="1"/>
</enum>
<enum name="video_pattern_sel">
<value name="VID_PRBS" value="0"/>
<value name="VID_INCREMENTAL" value="1"/>
<value name="VID_FIXED" value="2"/>
<value name="VID_MDSS_GENERAL_PATTERN" value="3"/>
</enum>
<enum name="cmd_mdp_stream0_pattern_sel">
<value name="CMD_MDP_PRBS" value="0"/>
<value name="CMD_MDP_INCREMENTAL" value="1"/>
<value name="CMD_MDP_FIXED" value="2"/>
<value name="CMD_MDP_MDSS_GENERAL_PATTERN" value="3"/>
</enum>
Annotation
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.