drivers/gpu/drm/msm/registers/display/hdmi.xml
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/msm/registers/display/hdmi.xml
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/msm/registers/display/hdmi.xml- Extension
.xml- Size
- 47975 bytes
- Lines
- 1105
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: drivers/gpu
- Status
- atlas-only
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
<?xml version="1.0" encoding="UTF-8"?>
<database xmlns="http://nouveau.freedesktop.org/"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="https://gitlab.freedesktop.org/freedreno/ rules-fd.xsd">
<import file="freedreno_copyright.xml"/>
<!--
NOTE: also see mdss_hdmi_util.h.. newer devices using MDSS appear
to have the same HDMI block (or maybe a newer version?) but for
some reason duplicate the code under drivers/video/msm/mdss
-->
<domain name="HDMI" width="32">
<enum name="hdmi_hdcp_key_state">
<value name="HDCP_KEYS_STATE_NO_KEYS" value="0"/>
<value name="HDCP_KEYS_STATE_NOT_CHECKED" value="1"/>
<value name="HDCP_KEYS_STATE_CHECKING" value="2"/>
<value name="HDCP_KEYS_STATE_VALID" value="3"/>
<value name="HDCP_KEYS_STATE_AKSV_NOT_VALID" value="4"/>
<value name="HDCP_KEYS_STATE_CHKSUM_MISMATCH" value="5"/>
<value name="HDCP_KEYS_STATE_PROD_AKSV" value="6"/>
<value name="HDCP_KEYS_STATE_RESERVED" value="7"/>
</enum>
<enum name="hdmi_ddc_read_write">
<value name="DDC_WRITE" value="0"/>
<value name="DDC_READ" value="1"/>
</enum>
<enum name="hdmi_acr_cts">
<value name="ACR_NONE" value="0"/>
<value name="ACR_32" value="1"/>
<value name="ACR_44" value="2"/>
<value name="ACR_48" value="3"/>
</enum>
<enum name="hdmi_cec_tx_status">
<value name="CEC_TX_OK" value="0"/>
<value name="CEC_TX_NACK" value="1"/>
<value name="CEC_TX_ARB_LOSS" value="2"/>
<value name="CEC_TX_MAX_RETRIES" value="3"/>
</enum>
<reg32 offset="0x00000" name="CTRL">
<bitfield name="ENABLE" pos="0" type="boolean"/>
<bitfield name="HDMI" pos="1" type="boolean"/>
<bitfield name="ENCRYPTED" pos="2" type="boolean"/>
</reg32>
<reg32 offset="0x00020" name="AUDIO_PKT_CTRL1">
<bitfield name="AUDIO_SAMPLE_SEND" pos="0" type="boolean"/>
</reg32>
<reg32 offset="0x00024" name="ACR_PKT_CTRL">
<!--
Guessing on order of bitfields from these comments:
/* AUDIO_PRIORITY | SOURCE */
acr_pck_ctrl_reg |= 0x80000100;
/* N_MULTIPLE(multiplier) */
acr_pck_ctrl_reg |= (multiplier & 7) << 16;
/* SEND | CONT */
acr_pck_ctrl_reg |= 0x00000003;
-->
<bitfield name="CONT" pos="0" type="boolean"/>
<bitfield name="SEND" pos="1" type="boolean"/>
<bitfield name="SELECT" low="4" high="5" type="hdmi_acr_cts"/>
<bitfield name="SOURCE" pos="8" type="boolean"/>
<bitfield name="N_MULTIPLIER" low="16" high="18" type="uint"/>
<bitfield name="AUDIO_PRIORITY" pos="31" type="boolean"/>
</reg32>
<reg32 offset="0x0028" name="VBI_PKT_CTRL">
<!--
Guessing on the order of bits from:
/* GC packet enable (every frame) */
Annotation
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.