drivers/gpu/drm/nouveau/dispnv50/base507c.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/dispnv50/base507c.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/nouveau/dispnv50/base507c.c- Extension
.c- Size
- 9278 bytes
- Lines
- 341
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
base.hnvif/if0014.hnvif/push507c.hnvif/timer.hnvhw/class/cl507c.hdrm/drm_atomic_helper.hdrm/drm_fourcc.hnouveau_bo.h
Detected Declarations
function filesfunction base507c_image_clrfunction base507c_image_setfunction base507c_xlut_clrfunction base507c_xlut_setfunction base507c_ntfy_wait_begunfunction base507c_ntfy_clrfunction base507c_ntfy_setfunction base507c_ntfy_resetfunction base507c_sema_clrfunction base507c_sema_setfunction base507c_releasefunction base507c_acquirefunction base507c_new_function base507c_new
Annotated Snippet
#include "base.h"
#include <nvif/if0014.h>
#include <nvif/push507c.h>
#include <nvif/timer.h>
#include <nvhw/class/cl507c.h>
#include <drm/drm_atomic_helper.h>
#include <drm/drm_fourcc.h>
#include "nouveau_bo.h"
int
base507c_update(struct nv50_wndw *wndw, u32 *interlock)
{
struct nvif_push *push = &wndw->wndw.push;
int ret;
if ((ret = PUSH_WAIT(push, 2)))
return ret;
PUSH_MTHD(push, NV507C, UPDATE, interlock[NV50_DISP_INTERLOCK_CORE]);
return PUSH_KICK(push);
}
int
base507c_image_clr(struct nv50_wndw *wndw)
{
struct nvif_push *push = &wndw->wndw.push;
int ret;
if ((ret = PUSH_WAIT(push, 4)))
return ret;
PUSH_MTHD(push, NV507C, SET_PRESENT_CONTROL,
NVDEF(NV507C, SET_PRESENT_CONTROL, BEGIN_MODE, NON_TEARING) |
NVVAL(NV507C, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, 0));
PUSH_MTHD(push, NV507C, SET_CONTEXT_DMA_ISO, 0x00000000);
return 0;
}
static int
base507c_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
{
struct nvif_push *push = &wndw->wndw.push;
int ret;
if ((ret = PUSH_WAIT(push, 13)))
return ret;
PUSH_MTHD(push, NV507C, SET_PRESENT_CONTROL,
NVVAL(NV507C, SET_PRESENT_CONTROL, BEGIN_MODE, asyw->image.mode) |
NVVAL(NV507C, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval));
PUSH_MTHD(push, NV507C, SET_CONTEXT_DMA_ISO, asyw->image.handle[0]);
if (asyw->image.format == NV507C_SURFACE_SET_PARAMS_FORMAT_RF16_GF16_BF16_AF16) {
PUSH_MTHD(push, NV507C, SET_PROCESSING,
NVDEF(NV507C, SET_PROCESSING, USE_GAIN_OFS, ENABLE),
SET_CONVERSION,
NVVAL(NV507C, SET_CONVERSION, GAIN, 0) |
NVVAL(NV507C, SET_CONVERSION, OFS, 0x64));
} else {
PUSH_MTHD(push, NV507C, SET_PROCESSING,
NVDEF(NV507C, SET_PROCESSING, USE_GAIN_OFS, DISABLE),
SET_CONVERSION,
NVVAL(NV507C, SET_CONVERSION, GAIN, 0) |
NVVAL(NV507C, SET_CONVERSION, OFS, 0));
}
PUSH_MTHD(push, NV507C, SURFACE_SET_OFFSET(0, 0), asyw->image.offset[0] >> 8);
PUSH_MTHD(push, NV507C, SURFACE_SET_SIZE(0),
NVVAL(NV507C, SURFACE_SET_SIZE, WIDTH, asyw->image.w) |
NVVAL(NV507C, SURFACE_SET_SIZE, HEIGHT, asyw->image.h),
SURFACE_SET_STORAGE(0),
NVVAL(NV507C, SURFACE_SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout) |
NVVAL(NV507C, SURFACE_SET_STORAGE, PITCH, asyw->image.pitch[0] >> 8) |
NVVAL(NV507C, SURFACE_SET_STORAGE, PITCH, asyw->image.blocks[0]) |
NVVAL(NV507C, SURFACE_SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh),
SURFACE_SET_PARAMS(0),
NVVAL(NV507C, SURFACE_SET_PARAMS, FORMAT, asyw->image.format) |
NVDEF(NV507C, SURFACE_SET_PARAMS, SUPER_SAMPLE, X1_AA) |
NVDEF(NV507C, SURFACE_SET_PARAMS, GAMMA, LINEAR) |
Annotation
- Immediate include surface: `base.h`, `nvif/if0014.h`, `nvif/push507c.h`, `nvif/timer.h`, `nvhw/class/cl507c.h`, `drm/drm_atomic_helper.h`, `drm/drm_fourcc.h`, `nouveau_bo.h`.
- Detected declarations: `function files`, `function base507c_image_clr`, `function base507c_image_set`, `function base507c_xlut_clr`, `function base507c_xlut_set`, `function base507c_ntfy_wait_begun`, `function base507c_ntfy_clr`, `function base507c_ntfy_set`, `function base507c_ntfy_reset`, `function base507c_sema_clr`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.