drivers/gpu/drm/nouveau/dispnv50/core.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/dispnv50/core.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/nouveau/dispnv50/core.c- Extension
.c- Size
- 2661 bytes
- Lines
- 75
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
core.hnvif/class.h
Detected Declarations
function filesfunction nv50_core_new
Annotated Snippet
#include "core.h"
#include <nvif/class.h>
void
nv50_core_del(struct nv50_core **pcore)
{
struct nv50_core *core = *pcore;
if (core) {
nv50_dmac_destroy(&core->chan);
kfree(*pcore);
*pcore = NULL;
}
}
int
nv50_core_new(struct nouveau_drm *drm, struct nv50_core **pcore)
{
struct {
s32 oclass;
int version;
int (*new)(struct nouveau_drm *, s32, struct nv50_core **);
} cores[] = {
{ GB202_DISP_CORE_CHANNEL_DMA, 0, coreca7d_new },
{ AD102_DISP_CORE_CHANNEL_DMA, 0, corec57d_new },
{ GA102_DISP_CORE_CHANNEL_DMA, 0, corec57d_new },
{ TU102_DISP_CORE_CHANNEL_DMA, 0, corec57d_new },
{ GV100_DISP_CORE_CHANNEL_DMA, 0, corec37d_new },
{ GP102_DISP_CORE_CHANNEL_DMA, 0, core917d_new },
{ GP100_DISP_CORE_CHANNEL_DMA, 0, core917d_new },
{ GM200_DISP_CORE_CHANNEL_DMA, 0, core917d_new },
{ GM107_DISP_CORE_CHANNEL_DMA, 0, core917d_new },
{ GK110_DISP_CORE_CHANNEL_DMA, 0, core917d_new },
{ GK104_DISP_CORE_CHANNEL_DMA, 0, core917d_new },
{ GF110_DISP_CORE_CHANNEL_DMA, 0, core907d_new },
{ GT214_DISP_CORE_CHANNEL_DMA, 0, core827d_new },
{ GT206_DISP_CORE_CHANNEL_DMA, 0, core827d_new },
{ GT200_DISP_CORE_CHANNEL_DMA, 0, core827d_new },
{ G82_DISP_CORE_CHANNEL_DMA, 0, core827d_new },
{ NV50_DISP_CORE_CHANNEL_DMA, 0, core507d_new },
{}
};
struct nv50_disp *disp = nv50_disp(drm->dev);
int cid;
cid = nvif_mclass(&disp->disp->object, cores);
if (cid < 0) {
NV_ERROR(drm, "No supported core channel class\n");
return cid;
}
return cores[cid].new(drm, cores[cid].oclass, pcore);
}
Annotation
- Immediate include surface: `core.h`, `nvif/class.h`.
- Detected declarations: `function files`, `function nv50_core_new`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.