drivers/gpu/drm/nouveau/dispnv50/curs.h

File Facts

System

Linux kernel

Corpus path

drivers/gpu/drm/nouveau/dispnv50/curs.h

Extension

.h

Size

512 bytes

Lines

15

Domain

Driver Families

Bucket

drivers/gpu

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• wndw.h

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef __NV50_KMS_CURS_H__
#define __NV50_KMS_CURS_H__
#include "wndw.h"

int curs507a_new(struct nouveau_drm *, int, s32, struct nv50_wndw **);
int curs507a_new_(const struct nv50_wimm_func *, struct nouveau_drm *,
		  int head, s32 oclass, u32 interlock_data,
		  struct nv50_wndw **);

int curs907a_new(struct nouveau_drm *, int, s32, struct nv50_wndw **);
int cursc37a_new(struct nouveau_drm *, int, s32, struct nv50_wndw **);

int nv50_curs_new(struct nouveau_drm *, int head, struct nv50_wndw **);
#endif

Annotation

• Immediate include surface: `wndw.h`.
• Atlas domain: Driver Families / drivers/gpu.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.