drivers/gpu/drm/nouveau/dispnv50/headca7d.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/dispnv50/headca7d.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/nouveau/dispnv50/headca7d.c
Extension
.c
Size
8905 bytes
Lines
298
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#include "head.h"
#include "atom.h"
#include "core.h"

#include <nvif/pushc97b.h>

#include <nvhw/class/clca7d.h>

static int
headca7d_display_id(struct nv50_head *head, u32 display_id)
{
	struct nvif_push *push = &head->disp->core->chan.push;
	const int i = head->base.index;
	int ret;

	ret = PUSH_WAIT(push, 2);
	if (ret)
		return ret;

	PUSH_MTHD(push, NVCA7D, HEAD_SET_DISPLAY_ID(i, 0), display_id);

	return 0;
}

static int
headca7d_or(struct nv50_head *head, struct nv50_head_atom *asyh)
{
	struct nvif_push *push = &head->disp->core->chan.push;
	const int i = head->base.index;
	u8 depth;
	int ret;

	switch (asyh->or.depth) {
	case 6:
		depth = NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_30_444;
		break;
	case 5:
		depth = NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_24_444;
		break;
	case 2:
		depth = NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_18_444;
		break;
	case 0:
		depth = NVCA7D_HEAD_SET_CONTROL_OUTPUT_RESOURCE_PIXEL_DEPTH_BPP_24_444;
		break;
	default:
		WARN_ON(1);
		return -EINVAL;
	}

	ret = PUSH_WAIT(push, 2);
	if (ret)
		return ret;

	PUSH_MTHD(push, NVCA7D, HEAD_SET_CONTROL_OUTPUT_RESOURCE(i),
		  NVVAL(NVCA7D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, CRC_MODE, asyh->or.crc_raster) |
		  NVVAL(NVCA7D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, HSYNC_POLARITY, asyh->or.nhsync) |
		  NVVAL(NVCA7D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, VSYNC_POLARITY, asyh->or.nvsync) |
		  NVVAL(NVCA7D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, PIXEL_DEPTH, depth) |
		  NVDEF(NVCA7D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, COLOR_SPACE_OVERRIDE, DISABLE) |
		  NVDEF(NVCA7D, HEAD_SET_CONTROL_OUTPUT_RESOURCE, EXT_PACKET_WIN, NONE));

	return 0;
}

static int
headca7d_procamp(struct nv50_head *head, struct nv50_head_atom *asyh)
{
	struct nvif_push *push = &head->disp->core->chan.push;
	const int i = head->base.index;
	int ret;

	ret = PUSH_WAIT(push, 2);
	if (ret)
		return ret;

	PUSH_MTHD(push, NVCA7D, HEAD_SET_PROCAMP(i),
		  NVDEF(NVCA7D, HEAD_SET_PROCAMP, COLOR_SPACE, RGB) |
		  NVDEF(NVCA7D, HEAD_SET_PROCAMP, CHROMA_LPF, DISABLE) |
		  NVDEF(NVCA7D, HEAD_SET_PROCAMP, DYNAMIC_RANGE, VESA));

	return 0;
}

static int
headca7d_dither(struct nv50_head *head, struct nv50_head_atom *asyh)
{
	struct nvif_push *push = &head->disp->core->chan.push;
	const int i = head->base.index;
	int ret;

Annotation

Implementation Notes