drivers/gpu/drm/nouveau/dispnv50/lut.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/dispnv50/lut.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/nouveau/dispnv50/lut.h- Extension
.h- Size
- 455 bytes
- Lines
- 17
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
nvif/mem.h
Detected Declarations
struct drm_property_blobstruct drm_color_lutstruct nv50_dispstruct nv50_lut
Annotated Snippet
struct nv50_lut {
struct nvif_mem mem[2];
};
int nv50_lut_init(struct nv50_disp *, struct nvif_mmu *, struct nv50_lut *);
void nv50_lut_fini(struct nv50_lut *);
u32 nv50_lut_load(struct nv50_lut *, int buffer, struct drm_property_blob *,
void (*)(struct drm_color_lut *, int size, void __iomem *));
#endif
Annotation
- Immediate include surface: `nvif/mem.h`.
- Detected declarations: `struct drm_property_blob`, `struct drm_color_lut`, `struct nv50_disp`, `struct nv50_lut`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.