drivers/gpu/drm/nouveau/dispnv50/ovly827e.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/dispnv50/ovly827e.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/nouveau/dispnv50/ovly827e.c- Extension
.c- Size
- 3967 bytes
- Lines
- 121
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
ovly.hatom.hnouveau_bo.hnvif/push507c.hnvif/timer.hnvhw/class/cl827e.h
Detected Declarations
function filesfunction ovly827e_ntfy_wait_begunfunction ovly827e_ntfy_resetfunction ovly827e_new
Annotated Snippet
#include "ovly.h"
#include "atom.h"
#include <nouveau_bo.h>
#include <nvif/push507c.h>
#include <nvif/timer.h>
#include <nvhw/class/cl827e.h>
static int
ovly827e_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
{
struct nvif_push *push = &wndw->wndw.push;
int ret;
if ((ret = PUSH_WAIT(push, 12)))
return ret;
PUSH_MTHD(push, NV827E, SET_PRESENT_CONTROL,
NVDEF(NV827E, SET_PRESENT_CONTROL, BEGIN_MODE, ASAP) |
NVVAL(NV827E, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval));
PUSH_MTHD(push, NV827E, SET_CONTEXT_DMA_ISO, asyw->image.handle[0]);
PUSH_MTHD(push, NV827E, SET_COMPOSITION_CONTROL,
NVDEF(NV827E, SET_COMPOSITION_CONTROL, MODE, OPAQUE_SUSPEND_BASE));
PUSH_MTHD(push, NV827E, SURFACE_SET_OFFSET, asyw->image.offset[0] >> 8);
PUSH_MTHD(push, NV827E, SURFACE_SET_SIZE,
NVVAL(NV827E, SURFACE_SET_SIZE, WIDTH, asyw->image.w) |
NVVAL(NV827E, SURFACE_SET_SIZE, HEIGHT, asyw->image.h),
SURFACE_SET_STORAGE,
NVVAL(NV827E, SURFACE_SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh) |
NVVAL(NV827E, SURFACE_SET_STORAGE, PITCH, (asyw->image.pitch[0] >> 8)) |
NVVAL(NV827E, SURFACE_SET_STORAGE, PITCH, asyw->image.blocks[0]) |
NVVAL(NV827E, SURFACE_SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout),
SURFACE_SET_PARAMS,
NVVAL(NV827E, SURFACE_SET_PARAMS, FORMAT, asyw->image.format) |
NVVAL(NV827E, SURFACE_SET_PARAMS, COLOR_SPACE, asyw->image.colorspace));
return 0;
}
int
ovly827e_ntfy_wait_begun(struct nouveau_bo *bo, u32 offset,
struct nvif_device *device)
{
s64 time = nvif_msec(device, 2000ULL,
if (NVBO_TD32(bo, offset, NV_DISP_NOTIFICATION_1, _3, STATUS, ==, BEGUN))
break;
usleep_range(1, 2);
);
return time < 0 ? time : 0;
}
void
ovly827e_ntfy_reset(struct nouveau_bo *bo, u32 offset)
{
NVBO_WR32(bo, offset, NV_DISP_NOTIFICATION_1, TIME_STAMP_0, 0);
NVBO_WR32(bo, offset, NV_DISP_NOTIFICATION_1, TIME_STAMP_1, 0);
NVBO_WR32(bo, offset, NV_DISP_NOTIFICATION_1, _2, 0);
NVBO_WR32(bo, offset, NV_DISP_NOTIFICATION_1, _3,
NVDEF(NV_DISP_NOTIFICATION_1, _3, STATUS, NOT_BEGUN));
}
static const struct nv50_wndw_func
ovly827e = {
.acquire = ovly507e_acquire,
.release = ovly507e_release,
.ntfy_set = base507c_ntfy_set,
.ntfy_clr = base507c_ntfy_clr,
.ntfy_reset = ovly827e_ntfy_reset,
.ntfy_wait_begun = ovly827e_ntfy_wait_begun,
.image_set = ovly827e_image_set,
.image_clr = base507c_image_clr,
.scale_set = ovly507e_scale_set,
.update = base507c_update,
};
const u32
ovly827e_format[] = {
DRM_FORMAT_YUYV,
DRM_FORMAT_UYVY,
DRM_FORMAT_XRGB8888,
DRM_FORMAT_XRGB1555,
DRM_FORMAT_XBGR2101010,
0
Annotation
- Immediate include surface: `ovly.h`, `atom.h`, `nouveau_bo.h`, `nvif/push507c.h`, `nvif/timer.h`, `nvhw/class/cl827e.h`.
- Detected declarations: `function files`, `function ovly827e_ntfy_wait_begun`, `function ovly827e_ntfy_reset`, `function ovly827e_new`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.