drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c- Extension
.c- Size
- 11235 bytes
- Lines
- 388
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
wndw.hatom.hdrm/drm_atomic_helper.hnouveau_bo.hnvif/class.hnvif/if0014.hnvif/pushc37b.hnvhw/class/clc37e.h
Detected Declarations
function filesfunction wndwc37e_csc_setfunction wndwc37e_ilut_clrfunction wndwc37e_ilut_setfunction wndwc37e_ilutfunction wndwc37e_blend_setfunction wndwc37e_image_clrfunction wndwc37e_image_setfunction wndwc37e_ntfy_clrfunction wndwc37e_ntfy_setfunction wndwc37e_sema_clrfunction wndwc37e_sema_setfunction wndwc37e_updatefunction wndwc37e_releasefunction wndwc37e_new_function wndwc37e_new
Annotated Snippet
#include "wndw.h"
#include "atom.h"
#include <drm/drm_atomic_helper.h>
#include <nouveau_bo.h>
#include <nvif/class.h>
#include <nvif/if0014.h>
#include <nvif/pushc37b.h>
#include <nvhw/class/clc37e.h>
static int
wndwc37e_csc_clr(struct nv50_wndw *wndw)
{
return 0;
}
static int
wndwc37e_csc_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
{
struct nvif_push *push = &wndw->wndw.push;
int ret;
if ((ret = PUSH_WAIT(push, 13)))
return ret;
PUSH_MTHD(push, NVC37E, SET_CSC_RED2RED, asyw->csc.matrix, 12);
return 0;
}
static int
wndwc37e_ilut_clr(struct nv50_wndw *wndw)
{
struct nvif_push *push = &wndw->wndw.push;
int ret;
if ((ret = PUSH_WAIT(push, 2)))
return ret;
PUSH_MTHD(push, NVC37E, SET_CONTEXT_DMA_INPUT_LUT, 0x00000000);
return 0;
}
static int
wndwc37e_ilut_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
{
struct nvif_push *push = &wndw->wndw.push;
int ret;
if ((ret = PUSH_WAIT(push, 4)))
return ret;
PUSH_MTHD(push, NVC37E, SET_CONTROL_INPUT_LUT,
NVVAL(NVC37E, SET_CONTROL_INPUT_LUT, OUTPUT_MODE, asyw->xlut.i.output_mode) |
NVVAL(NVC37E, SET_CONTROL_INPUT_LUT, RANGE, asyw->xlut.i.range) |
NVVAL(NVC37E, SET_CONTROL_INPUT_LUT, SIZE, asyw->xlut.i.size),
SET_OFFSET_INPUT_LUT, asyw->xlut.i.offset >> 8,
SET_CONTEXT_DMA_INPUT_LUT, asyw->xlut.handle);
return 0;
}
static void
wndwc37e_ilut(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw, int size)
{
asyw->xlut.i.size = size == 1024 ? NVC37E_SET_CONTROL_INPUT_LUT_SIZE_SIZE_1025 :
NVC37E_SET_CONTROL_INPUT_LUT_SIZE_SIZE_257;
asyw->xlut.i.range = NVC37E_SET_CONTROL_INPUT_LUT_RANGE_UNITY;
asyw->xlut.i.output_mode = NVC37E_SET_CONTROL_INPUT_LUT_OUTPUT_MODE_INTERPOLATE;
asyw->xlut.i.load = head907d_olut_load;
}
int
wndwc37e_blend_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
{
struct nvif_push *push = &wndw->wndw.push;
int ret;
if ((ret = PUSH_WAIT(push, 8)))
return ret;
PUSH_MTHD(push, NVC37E, SET_COMPOSITION_CONTROL,
NVDEF(NVC37E, SET_COMPOSITION_CONTROL, COLOR_KEY_SELECT, DISABLE) |
NVVAL(NVC37E, SET_COMPOSITION_CONTROL, DEPTH, asyw->blend.depth),
SET_COMPOSITION_CONSTANT_ALPHA,
NVVAL(NVC37E, SET_COMPOSITION_CONSTANT_ALPHA, K1, asyw->blend.k1) |
NVVAL(NVC37E, SET_COMPOSITION_CONSTANT_ALPHA, K2, 0),
Annotation
- Immediate include surface: `wndw.h`, `atom.h`, `drm/drm_atomic_helper.h`, `nouveau_bo.h`, `nvif/class.h`, `nvif/if0014.h`, `nvif/pushc37b.h`, `nvhw/class/clc37e.h`.
- Detected declarations: `function files`, `function wndwc37e_csc_set`, `function wndwc37e_ilut_clr`, `function wndwc37e_ilut_set`, `function wndwc37e_ilut`, `function wndwc37e_blend_set`, `function wndwc37e_image_clr`, `function wndwc37e_image_set`, `function wndwc37e_ntfy_clr`, `function wndwc37e_ntfy_set`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.