drivers/gpu/drm/nouveau/include/nvhw/class/cl507c.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/include/nvhw/class/cl507c.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/nouveau/include/nvhw/class/cl507c.h- Extension
.h- Size
- 12857 bytes
- Lines
- 166
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _cl507c_h_
#define _cl507c_h_
#define NV_DISP_BASE_NOTIFIER_1 0x00000000
#define NV_DISP_BASE_NOTIFIER_1_SIZEOF 0x00000004
#define NV_DISP_BASE_NOTIFIER_1__0 0x00000000
#define NV_DISP_BASE_NOTIFIER_1__0_PRESENTATION_COUNT 15:0
#define NV_DISP_BASE_NOTIFIER_1__0_TIMESTAMP 29:16
#define NV_DISP_BASE_NOTIFIER_1__0_STATUS 31:30
#define NV_DISP_BASE_NOTIFIER_1__0_STATUS_NOT_BEGUN 0x00000000
#define NV_DISP_BASE_NOTIFIER_1__0_STATUS_BEGUN 0x00000001
#define NV_DISP_BASE_NOTIFIER_1__0_STATUS_FINISHED 0x00000002
// dma opcode instructions
#define NV507C_DMA 0x00000000
#define NV507C_DMA_OPCODE 31:29
#define NV507C_DMA_OPCODE_METHOD 0x00000000
#define NV507C_DMA_OPCODE_JUMP 0x00000001
#define NV507C_DMA_OPCODE_NONINC_METHOD 0x00000002
#define NV507C_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003
#define NV507C_DMA_OPCODE 31:29
#define NV507C_DMA_OPCODE_METHOD 0x00000000
#define NV507C_DMA_OPCODE_NONINC_METHOD 0x00000002
#define NV507C_DMA_METHOD_COUNT 27:18
#define NV507C_DMA_METHOD_OFFSET 11:2
#define NV507C_DMA_DATA 31:0
#define NV507C_DMA_NOP 0x00000000
#define NV507C_DMA_OPCODE 31:29
#define NV507C_DMA_OPCODE_JUMP 0x00000001
#define NV507C_DMA_JUMP_OFFSET 11:2
#define NV507C_DMA_OPCODE 31:29
#define NV507C_DMA_OPCODE_SET_SUBDEVICE_MASK 0x00000003
#define NV507C_DMA_SET_SUBDEVICE_MASK_VALUE 11:0
// class methods
#define NV507C_PUT (0x00000000)
#define NV507C_PUT_PTR 11:2
#define NV507C_GET (0x00000004)
#define NV507C_GET_PTR 11:2
#define NV507C_UPDATE (0x00000080)
#define NV507C_UPDATE_INTERLOCK_WITH_CORE 0:0
#define NV507C_UPDATE_INTERLOCK_WITH_CORE_DISABLE (0x00000000)
#define NV507C_UPDATE_INTERLOCK_WITH_CORE_ENABLE (0x00000001)
#define NV507C_SET_PRESENT_CONTROL (0x00000084)
#define NV507C_SET_PRESENT_CONTROL_BEGIN_MODE 9:8
#define NV507C_SET_PRESENT_CONTROL_BEGIN_MODE_NON_TEARING (0x00000000)
#define NV507C_SET_PRESENT_CONTROL_BEGIN_MODE_IMMEDIATE (0x00000001)
#define NV507C_SET_PRESENT_CONTROL_BEGIN_MODE_ON_LINE (0x00000002)
#define NV507C_SET_PRESENT_CONTROL_MIN_PRESENT_INTERVAL 7:4
#define NV507C_SET_PRESENT_CONTROL_BEGIN_LINE 30:16
#define NV507C_SET_PRESENT_CONTROL_ON_LINE_MARGIN 15:10
#define NV507C_SET_SEMAPHORE_CONTROL (0x00000088)
#define NV507C_SET_SEMAPHORE_CONTROL_OFFSET 11:2
#define NV507C_SET_SEMAPHORE_ACQUIRE (0x0000008C)
#define NV507C_SET_SEMAPHORE_ACQUIRE_VALUE 31:0
#define NV507C_SET_SEMAPHORE_RELEASE (0x00000090)
#define NV507C_SET_SEMAPHORE_RELEASE_VALUE 31:0
#define NV507C_SET_CONTEXT_DMA_SEMAPHORE (0x00000094)
#define NV507C_SET_CONTEXT_DMA_SEMAPHORE_HANDLE 31:0
#define NV507C_SET_NOTIFIER_CONTROL (0x000000A0)
#define NV507C_SET_NOTIFIER_CONTROL_MODE 30:30
#define NV507C_SET_NOTIFIER_CONTROL_MODE_WRITE (0x00000000)
#define NV507C_SET_NOTIFIER_CONTROL_MODE_WRITE_AWAKEN (0x00000001)
#define NV507C_SET_NOTIFIER_CONTROL_OFFSET 11:2
#define NV507C_SET_CONTEXT_DMA_NOTIFIER (0x000000A4)
#define NV507C_SET_CONTEXT_DMA_NOTIFIER_HANDLE 31:0
#define NV507C_SET_CONTEXT_DMA_ISO (0x000000C0)
#define NV507C_SET_CONTEXT_DMA_ISO_HANDLE 31:0
#define NV507C_SET_BASE_LUT_LO (0x000000E0)
#define NV507C_SET_BASE_LUT_LO_ENABLE 31:30
#define NV507C_SET_BASE_LUT_LO_ENABLE_DISABLE (0x00000000)
#define NV507C_SET_BASE_LUT_LO_ENABLE_USE_CORE_LUT (0x00000001)
#define NV507C_SET_BASE_LUT_LO_ENABLE_ENABLE (0x00000003)
#define NV507C_SET_BASE_LUT_LO_MODE 29:29
#define NV507C_SET_BASE_LUT_LO_MODE_LORES (0x00000000)
#define NV507C_SET_BASE_LUT_LO_MODE_HIRES (0x00000001)
#define NV507C_SET_BASE_LUT_LO_ORIGIN 7:2
#define NV507C_SET_PROCESSING (0x00000110)
#define NV507C_SET_PROCESSING_USE_GAIN_OFS 0:0
#define NV507C_SET_PROCESSING_USE_GAIN_OFS_DISABLE (0x00000000)
#define NV507C_SET_PROCESSING_USE_GAIN_OFS_ENABLE (0x00000001)
#define NV507C_SET_CONVERSION (0x00000114)
#define NV507C_SET_CONVERSION_GAIN 15:0
#define NV507C_SET_CONVERSION_OFS 31:16
#define NV507C_SURFACE_SET_OFFSET(a,b) (0x00000800 + (a)*0x00000020 + (b)*0x00000004)
#define NV507C_SURFACE_SET_OFFSET_ORIGIN 31:0
#define NV507C_SURFACE_SET_SIZE(a) (0x00000808 + (a)*0x00000020)
#define NV507C_SURFACE_SET_SIZE_WIDTH 14:0Annotation
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.