drivers/gpu/drm/nouveau/include/nvhw/class/cl507d.h
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/include/nvhw/class/cl507d.h
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/nouveau/include/nvhw/class/cl507d.h- Extension
.h- Size
- 32804 bytes
- Lines
- 376
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef _cl507d_h_
#define _cl507d_h_
#define NV_DISP_CORE_NOTIFIER_1 0x00000000
#define NV_DISP_CORE_NOTIFIER_1_SIZEOF 0x00000054
#define NV_DISP_CORE_NOTIFIER_1_COMPLETION_0 0x00000000
#define NV_DISP_CORE_NOTIFIER_1_COMPLETION_0_DONE 0:0
#define NV_DISP_CORE_NOTIFIER_1_COMPLETION_0_DONE_FALSE 0x00000000
#define NV_DISP_CORE_NOTIFIER_1_COMPLETION_0_DONE_TRUE 0x00000001
#define NV_DISP_CORE_NOTIFIER_1_COMPLETION_0_R0 15:1
#define NV_DISP_CORE_NOTIFIER_1_COMPLETION_0_TIMESTAMP 29:16
#define NV_DISP_CORE_NOTIFIER_1_CAPABILITIES_1 0x00000001
#define NV_DISP_CORE_NOTIFIER_1_CAPABILITIES_1_DONE 0:0
#define NV_DISP_CORE_NOTIFIER_1_CAPABILITIES_1_DONE_FALSE 0x00000000
#define NV_DISP_CORE_NOTIFIER_1_CAPABILITIES_1_DONE_TRUE 0x00000001
// class methods
#define NV507D_UPDATE (0x00000080)
#define NV507D_UPDATE_INTERLOCK_WITH_CURSOR0 0:0
#define NV507D_UPDATE_INTERLOCK_WITH_CURSOR0_DISABLE (0x00000000)
#define NV507D_UPDATE_INTERLOCK_WITH_CURSOR0_ENABLE (0x00000001)
#define NV507D_UPDATE_INTERLOCK_WITH_CURSOR1 8:8
#define NV507D_UPDATE_INTERLOCK_WITH_CURSOR1_DISABLE (0x00000000)
#define NV507D_UPDATE_INTERLOCK_WITH_CURSOR1_ENABLE (0x00000001)
#define NV507D_UPDATE_INTERLOCK_WITH_BASE0 1:1
#define NV507D_UPDATE_INTERLOCK_WITH_BASE0_DISABLE (0x00000000)
#define NV507D_UPDATE_INTERLOCK_WITH_BASE0_ENABLE (0x00000001)
#define NV507D_UPDATE_INTERLOCK_WITH_BASE1 9:9
#define NV507D_UPDATE_INTERLOCK_WITH_BASE1_DISABLE (0x00000000)
#define NV507D_UPDATE_INTERLOCK_WITH_BASE1_ENABLE (0x00000001)
#define NV507D_UPDATE_INTERLOCK_WITH_OVERLAY0 2:2
#define NV507D_UPDATE_INTERLOCK_WITH_OVERLAY0_DISABLE (0x00000000)
#define NV507D_UPDATE_INTERLOCK_WITH_OVERLAY0_ENABLE (0x00000001)
#define NV507D_UPDATE_INTERLOCK_WITH_OVERLAY1 10:10
#define NV507D_UPDATE_INTERLOCK_WITH_OVERLAY1_DISABLE (0x00000000)
#define NV507D_UPDATE_INTERLOCK_WITH_OVERLAY1_ENABLE (0x00000001)
#define NV507D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM0 3:3
#define NV507D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM0_DISABLE (0x00000000)
#define NV507D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM0_ENABLE (0x00000001)
#define NV507D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM1 11:11
#define NV507D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM1_DISABLE (0x00000000)
#define NV507D_UPDATE_INTERLOCK_WITH_OVERLAY_IMM1_ENABLE (0x00000001)
#define NV507D_UPDATE_NOT_DRIVER_FRIENDLY 31:31
#define NV507D_UPDATE_NOT_DRIVER_FRIENDLY_FALSE (0x00000000)
#define NV507D_UPDATE_NOT_DRIVER_FRIENDLY_TRUE (0x00000001)
#define NV507D_UPDATE_NOT_DRIVER_UNFRIENDLY 30:30
#define NV507D_UPDATE_NOT_DRIVER_UNFRIENDLY_FALSE (0x00000000)
#define NV507D_UPDATE_NOT_DRIVER_UNFRIENDLY_TRUE (0x00000001)
#define NV507D_UPDATE_INHIBIT_INTERRUPTS 29:29
#define NV507D_UPDATE_INHIBIT_INTERRUPTS_FALSE (0x00000000)
#define NV507D_UPDATE_INHIBIT_INTERRUPTS_TRUE (0x00000001)
#define NV507D_SET_NOTIFIER_CONTROL (0x00000084)
#define NV507D_SET_NOTIFIER_CONTROL_MODE 30:30
#define NV507D_SET_NOTIFIER_CONTROL_MODE_WRITE (0x00000000)
#define NV507D_SET_NOTIFIER_CONTROL_MODE_WRITE_AWAKEN (0x00000001)
#define NV507D_SET_NOTIFIER_CONTROL_OFFSET 11:2
#define NV507D_SET_NOTIFIER_CONTROL_NOTIFY 31:31
#define NV507D_SET_NOTIFIER_CONTROL_NOTIFY_DISABLE (0x00000000)
#define NV507D_SET_NOTIFIER_CONTROL_NOTIFY_ENABLE (0x00000001)
#define NV507D_SET_CONTEXT_DMA_NOTIFIER (0x00000088)
#define NV507D_SET_CONTEXT_DMA_NOTIFIER_HANDLE 31:0
#define NV507D_GET_CAPABILITIES (0x0000008C)
#define NV507D_GET_CAPABILITIES_DUMMY 31:0
#define NV507D_DAC_SET_CONTROL(a) (0x00000400 + (a)*0x00000080)
#define NV507D_DAC_SET_CONTROL_OWNER 3:0
#define NV507D_DAC_SET_CONTROL_OWNER_NONE (0x00000000)
#define NV507D_DAC_SET_CONTROL_OWNER_HEAD0 (0x00000001)
#define NV507D_DAC_SET_CONTROL_OWNER_HEAD1 (0x00000002)
#define NV507D_DAC_SET_CONTROL_SUB_OWNER 5:4
#define NV507D_DAC_SET_CONTROL_SUB_OWNER_NONE (0x00000000)
#define NV507D_DAC_SET_CONTROL_SUB_OWNER_SUBHEAD0 (0x00000001)
#define NV507D_DAC_SET_CONTROL_SUB_OWNER_SUBHEAD1 (0x00000002)
#define NV507D_DAC_SET_CONTROL_SUB_OWNER_BOTH (0x00000003)
#define NV507D_DAC_SET_CONTROL_PROTOCOL 13:8
#define NV507D_DAC_SET_CONTROL_PROTOCOL_RGB_CRT (0x00000000)
#define NV507D_DAC_SET_CONTROL_PROTOCOL_CPST_NTSC_M (0x00000001)
#define NV507D_DAC_SET_CONTROL_PROTOCOL_CPST_NTSC_J (0x00000002)
#define NV507D_DAC_SET_CONTROL_PROTOCOL_CPST_PAL_BDGHI (0x00000003)
#define NV507D_DAC_SET_CONTROL_PROTOCOL_CPST_PAL_M (0x00000004)
#define NV507D_DAC_SET_CONTROL_PROTOCOL_CPST_PAL_N (0x00000005)
#define NV507D_DAC_SET_CONTROL_PROTOCOL_CPST_PAL_CN (0x00000006)
#define NV507D_DAC_SET_CONTROL_PROTOCOL_COMP_NTSC_M (0x00000007)
#define NV507D_DAC_SET_CONTROL_PROTOCOL_COMP_NTSC_J (0x00000008)
#define NV507D_DAC_SET_CONTROL_PROTOCOL_COMP_PAL_BDGHI (0x00000009)
#define NV507D_DAC_SET_CONTROL_PROTOCOL_COMP_PAL_M (0x0000000A)
#define NV507D_DAC_SET_CONTROL_PROTOCOL_COMP_PAL_N (0x0000000B)
#define NV507D_DAC_SET_CONTROL_PROTOCOL_COMP_PAL_CN (0x0000000C)
#define NV507D_DAC_SET_CONTROL_PROTOCOL_COMP_480P_60 (0x0000000D)
#define NV507D_DAC_SET_CONTROL_PROTOCOL_COMP_576P_50 (0x0000000E)
Annotation
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.