drivers/gpu/drm/nouveau/include/nvhw/class/clc37e.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/include/nvhw/class/clc37e.h

File Facts

System: Linux kernel
Corpus path: drivers/gpu/drm/nouveau/include/nvhw/class/clc37e.h
Extension: .h
Size: 34671 bytes
Lines: 395
Domain: Driver Families
Bucket: drivers/gpu
Inferred role: Driver Families: implementation source
Status: source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef _clC37e_h_
#define _clC37e_h_

// class methods
#define NVC37E_UPDATE                                                           (0x00000200)
#define NVC37E_UPDATE_INTERLOCK_WITH_WIN_IMM                                    12:12
#define NVC37E_UPDATE_INTERLOCK_WITH_WIN_IMM_DISABLE                            (0x00000000)
#define NVC37E_UPDATE_INTERLOCK_WITH_WIN_IMM_ENABLE                             (0x00000001)
#define NVC37E_SET_SEMAPHORE_CONTROL                                            (0x0000020C)
#define NVC37E_SET_SEMAPHORE_CONTROL_OFFSET                                     7:0
#define NVC37E_SET_SEMAPHORE_ACQUIRE                                            (0x00000210)
#define NVC37E_SET_SEMAPHORE_ACQUIRE_VALUE                                      31:0
#define NVC37E_SET_SEMAPHORE_RELEASE                                            (0x00000214)
#define NVC37E_SET_SEMAPHORE_RELEASE_VALUE                                      31:0
#define NVC37E_SET_CONTEXT_DMA_SEMAPHORE                                        (0x00000218)
#define NVC37E_SET_CONTEXT_DMA_SEMAPHORE_HANDLE                                 31:0
#define NVC37E_SET_CONTEXT_DMA_NOTIFIER                                         (0x0000021C)
#define NVC37E_SET_CONTEXT_DMA_NOTIFIER_HANDLE                                  31:0
#define NVC37E_SET_NOTIFIER_CONTROL                                             (0x00000220)
#define NVC37E_SET_NOTIFIER_CONTROL_MODE                                        0:0
#define NVC37E_SET_NOTIFIER_CONTROL_MODE_WRITE                                  (0x00000000)
#define NVC37E_SET_NOTIFIER_CONTROL_MODE_WRITE_AWAKEN                           (0x00000001)
#define NVC37E_SET_NOTIFIER_CONTROL_OFFSET                                      11:4
#define NVC37E_SET_SIZE                                                         (0x00000224)
#define NVC37E_SET_SIZE_WIDTH                                                   15:0
#define NVC37E_SET_SIZE_HEIGHT                                                  31:16
#define NVC37E_SET_STORAGE                                                      (0x00000228)
#define NVC37E_SET_STORAGE_BLOCK_HEIGHT                                         3:0
#define NVC37E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_ONE_GOB                (0x00000000)
#define NVC37E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_TWO_GOBS               (0x00000001)
#define NVC37E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_FOUR_GOBS              (0x00000002)
#define NVC37E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_EIGHT_GOBS             (0x00000003)
#define NVC37E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_SIXTEEN_GOBS           (0x00000004)
#define NVC37E_SET_STORAGE_BLOCK_HEIGHT_NVD_BLOCK_HEIGHT_THIRTYTWO_GOBS         (0x00000005)
#define NVC37E_SET_STORAGE_MEMORY_LAYOUT                                        4:4
#define NVC37E_SET_STORAGE_MEMORY_LAYOUT_BLOCKLINEAR                            (0x00000000)
#define NVC37E_SET_STORAGE_MEMORY_LAYOUT_PITCH                                  (0x00000001)
#define NVC37E_SET_PARAMS                                                       (0x0000022C)
#define NVC37E_SET_PARAMS_FORMAT                                                7:0
#define NVC37E_SET_PARAMS_FORMAT_I8                                             (0x0000001E)
#define NVC37E_SET_PARAMS_FORMAT_R4G4B4A4                                       (0x0000002F)
#define NVC37E_SET_PARAMS_FORMAT_R5G6B5                                         (0x000000E8)
#define NVC37E_SET_PARAMS_FORMAT_A1R5G5B5                                       (0x000000E9)
#define NVC37E_SET_PARAMS_FORMAT_R5G5B5A1                                       (0x0000002E)
#define NVC37E_SET_PARAMS_FORMAT_A8R8G8B8                                       (0x000000CF)
#define NVC37E_SET_PARAMS_FORMAT_X8R8G8B8                                       (0x000000E6)
#define NVC37E_SET_PARAMS_FORMAT_A8B8G8R8                                       (0x000000D5)
#define NVC37E_SET_PARAMS_FORMAT_X8B8G8R8                                       (0x000000F9)
#define NVC37E_SET_PARAMS_FORMAT_A2R10G10B10                                    (0x000000DF)
#define NVC37E_SET_PARAMS_FORMAT_A2B10G10R10                                    (0x000000D1)
#define NVC37E_SET_PARAMS_FORMAT_X2BL10GL10RL10_XRBIAS                          (0x00000022)
#define NVC37E_SET_PARAMS_FORMAT_X2BL10GL10RL10_XVYCC                           (0x00000024)
#define NVC37E_SET_PARAMS_FORMAT_R16_G16_B16_A16_NVBIAS                         (0x00000023)
#define NVC37E_SET_PARAMS_FORMAT_R16_G16_B16_A16                                (0x000000C6)
#define NVC37E_SET_PARAMS_FORMAT_RF16_GF16_BF16_AF16                            (0x000000CA)
#define NVC37E_SET_PARAMS_FORMAT_Y8_U8__Y8_V8_N422                              (0x00000028)
#define NVC37E_SET_PARAMS_FORMAT_U8_Y8__V8_Y8_N422                              (0x00000029)
#define NVC37E_SET_PARAMS_FORMAT_Y8___U8V8_N444                                 (0x00000035)
#define NVC37E_SET_PARAMS_FORMAT_Y8___U8V8_N422                                 (0x00000036)
#define NVC37E_SET_PARAMS_FORMAT_Y8___U8V8_N422R                                (0x00000037)
#define NVC37E_SET_PARAMS_FORMAT_Y8___V8U8_N420                                 (0x00000038)
#define NVC37E_SET_PARAMS_FORMAT_Y8___U8___V8_N444                              (0x0000003A)
#define NVC37E_SET_PARAMS_FORMAT_Y8___U8___V8_N420                              (0x0000003B)
#define NVC37E_SET_PARAMS_FORMAT_Y10___U10V10_N444                              (0x00000055)
#define NVC37E_SET_PARAMS_FORMAT_Y10___U10V10_N422                              (0x00000056)
#define NVC37E_SET_PARAMS_FORMAT_Y10___U10V10_N422R                             (0x00000057)
#define NVC37E_SET_PARAMS_FORMAT_Y10___V10U10_N420                              (0x00000058)
#define NVC37E_SET_PARAMS_FORMAT_Y10___U10___V10_N444                           (0x0000005A)
#define NVC37E_SET_PARAMS_FORMAT_Y10___U10___V10_N420                           (0x0000005B)
#define NVC37E_SET_PARAMS_FORMAT_Y12___U12V12_N444                              (0x00000075)
#define NVC37E_SET_PARAMS_FORMAT_Y12___U12V12_N422                              (0x00000076)
#define NVC37E_SET_PARAMS_FORMAT_Y12___U12V12_N422R                             (0x00000077)
#define NVC37E_SET_PARAMS_FORMAT_Y12___V12U12_N420                              (0x00000078)
#define NVC37E_SET_PARAMS_FORMAT_Y12___U12___V12_N444                           (0x0000007A)
#define NVC37E_SET_PARAMS_FORMAT_Y12___U12___V12_N420                           (0x0000007B)
#define NVC37E_SET_PARAMS_COLOR_SPACE                                           9:8
#define NVC37E_SET_PARAMS_COLOR_SPACE_RGB                                       (0x00000000)
#define NVC37E_SET_PARAMS_COLOR_SPACE_YUV_601                                   (0x00000001)
#define NVC37E_SET_PARAMS_COLOR_SPACE_YUV_709                                   (0x00000002)
#define NVC37E_SET_PARAMS_COLOR_SPACE_YUV_2020                                  (0x00000003)
#define NVC37E_SET_PARAMS_INPUT_RANGE                                           13:12
#define NVC37E_SET_PARAMS_INPUT_RANGE_BYPASS                                    (0x00000000)
#define NVC37E_SET_PARAMS_INPUT_RANGE_LIMITED                                   (0x00000001)
#define NVC37E_SET_PARAMS_INPUT_RANGE_FULL                                      (0x00000002)
#define NVC37E_SET_PARAMS_UNDERREPLICATE                                        16:16
#define NVC37E_SET_PARAMS_UNDERREPLICATE_DISABLE                                (0x00000000)
#define NVC37E_SET_PARAMS_UNDERREPLICATE_ENABLE                                 (0x00000001)
#define NVC37E_SET_PARAMS_DE_GAMMA                                              21:20
#define NVC37E_SET_PARAMS_DE_GAMMA_NONE                                         (0x00000000)
#define NVC37E_SET_PARAMS_DE_GAMMA_SRGB                                         (0x00000001)

Annotation

Atlas domain: Driver Families / drivers/gpu.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.