drivers/gpu/drm/nouveau/include/nvif/class.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/include/nvif/class.h

File Facts

System: Linux kernel
Corpus path: drivers/gpu/drm/nouveau/include/nvif/class.h
Extension: .h
Size: 18931 bytes
Lines: 296
Domain: Driver Families
Bucket: drivers/gpu
Inferred role: Driver Families: implementation source
Status: source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

#ifndef __NVIF_CLASS_H__
#define __NVIF_CLASS_H__

/* these class numbers are made up by us, and not nvidia-assigned */
#define NVIF_CLASS_CLIENT                            /* if0000.h */ -0x00000000

#define NVIF_CLASS_CONTROL                           /* if0001.h */ -0x00000001

#define NVIF_CLASS_SW_NV04                           /* if0004.h */ -0x00000004
#define NVIF_CLASS_SW_NV10                           /* if0005.h */ -0x00000005
#define NVIF_CLASS_SW_NV50                           /* if0005.h */ -0x00000006
#define NVIF_CLASS_SW_GF100                          /* if0005.h */ -0x00000007

#define NVIF_CLASS_MMU                               /* if0008.h */  0x80000008
#define NVIF_CLASS_MMU_NV04                          /* if0008.h */  0x80000009
#define NVIF_CLASS_MMU_NV50                          /* if0008.h */  0x80005009
#define NVIF_CLASS_MMU_GF100                         /* if0008.h */  0x80009009

#define NVIF_CLASS_MEM                               /* if000a.h */  0x8000000a
#define NVIF_CLASS_MEM_NV04                          /* if000b.h */  0x8000000b
#define NVIF_CLASS_MEM_NV50                          /* if500b.h */  0x8000500b
#define NVIF_CLASS_MEM_GF100                         /* if900b.h */  0x8000900b

#define NVIF_CLASS_VMM                               /* if000c.h */  0x8000000c
#define NVIF_CLASS_VMM_NV04                          /* if000d.h */  0x8000000d
#define NVIF_CLASS_VMM_NV50                          /* if500d.h */  0x8000500d
#define NVIF_CLASS_VMM_GF100                         /* if900d.h */  0x8000900d
#define NVIF_CLASS_VMM_GM200                         /* ifb00d.h */  0x8000b00d
#define NVIF_CLASS_VMM_GP100                         /* ifc00d.h */  0x8000c00d

#define NVIF_CLASS_EVENT                             /* if000e.h */  0x8000000e

#define NVIF_CLASS_DISP                              /* if0010.h */  0x80000010
#define NVIF_CLASS_CONN                              /* if0011.h */  0x80000011
#define NVIF_CLASS_OUTP                              /* if0012.h */  0x80000012
#define NVIF_CLASS_HEAD                              /* if0013.h */  0x80000013
#define NVIF_CLASS_DISP_CHAN                         /* if0014.h */  0x80000014

#define NVIF_CLASS_CHAN                              /* if0020.h */  0x80000020
#define NVIF_CLASS_CGRP                              /* if0021.h */  0x80000021

/* the below match nvidia-assigned (either in hw, or sw) class numbers */
#define NV_NULL_CLASS                                                0x00000030

#define NV_DEVICE                                     /* cl0080.h */ 0x00000080

#define NV_DMA_FROM_MEMORY                            /* cl0002.h */ 0x00000002
#define NV_DMA_TO_MEMORY                              /* cl0002.h */ 0x00000003
#define NV_DMA_IN_MEMORY                              /* cl0002.h */ 0x0000003d

#define NV50_TWOD                                                    0x0000502d
#define FERMI_TWOD_A                                                 0x0000902d

#define NV50_MEMORY_TO_MEMORY_FORMAT                                 0x00005039
#define FERMI_MEMORY_TO_MEMORY_FORMAT_A                              0x00009039

#define KEPLER_INLINE_TO_MEMORY_A                                    0x0000a040
#define KEPLER_INLINE_TO_MEMORY_B                                    0x0000a140
#define BLACKWELL_INLINE_TO_MEMORY_A                                 0x0000cd40

#define NV04_DISP                                     /* cl0046.h */ 0x00000046

#define VOLTA_USERMODE_A                                             0x0000c361
#define TURING_USERMODE_A                                            0x0000c461
#define AMPERE_USERMODE_A                                            0x0000c561
#define HOPPER_USERMODE_A                                            0x0000c661
#define BLACKWELL_USERMODE_A                                         0x0000c761

#define MAXWELL_FAULT_BUFFER_A                        /* clb069.h */ 0x0000b069
#define VOLTA_FAULT_BUFFER_A                          /* clb069.h */ 0x0000c369

#define NV03_CHANNEL_DMA                              /* if0020.h */ 0x0000006b
#define NV10_CHANNEL_DMA                              /* if0020.h */ 0x0000006e
#define NV17_CHANNEL_DMA                              /* if0020.h */ 0x0000176e
#define NV40_CHANNEL_DMA                              /* if0020.h */ 0x0000406e

#define KEPLER_CHANNEL_GROUP_A                        /* if0021.h */ 0x0000a06c

#define NV50_CHANNEL_GPFIFO                           /* if0020.h */ 0x0000506f
#define G82_CHANNEL_GPFIFO                            /* if0020.h */ 0x0000826f
#define FERMI_CHANNEL_GPFIFO                          /* if0020.h */ 0x0000906f
#define KEPLER_CHANNEL_GPFIFO_A                       /* if0020.h */ 0x0000a06f
#define KEPLER_CHANNEL_GPFIFO_B                       /* if0020.h */ 0x0000a16f
#define MAXWELL_CHANNEL_GPFIFO_A                      /* if0020.h */ 0x0000b06f
#define PASCAL_CHANNEL_GPFIFO_A                       /* if0020.h */ 0x0000c06f
#define VOLTA_CHANNEL_GPFIFO_A                        /* if0020.h */ 0x0000c36f
#define TURING_CHANNEL_GPFIFO_A                       /* if0020.h */ 0x0000c46f
#define AMPERE_CHANNEL_GPFIFO_A                       /* if0020.h */ 0x0000c56f
#define AMPERE_CHANNEL_GPFIFO_B                       /* if0020.h */ 0x0000c76f
#define HOPPER_CHANNEL_GPFIFO_A                                      0x0000c86f

Annotation

Atlas domain: Driver Families / drivers/gpu.
Implementation status: source implementation candidate.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.