drivers/gpu/drm/nouveau/include/nvif/mem.h

File Facts

System

Linux kernel

Corpus path

drivers/gpu/drm/nouveau/include/nvif/mem.h

Extension

.h

Size

619 bytes

Lines

23

Domain

Driver Families

Bucket

drivers/gpu

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• mmu.h

Detected Declarations

• struct nvif_mem

Annotated Snippet

struct nvif_mem {
	struct nvif_object object;
	u8  type;
	u8  page;
	u64 addr;
	u64 size;
};

int nvif_mem_ctor_type(struct nvif_mmu *mmu, const char *name, s32 oclass,
		       int type, u8 page, u64 size, void *argv, u32 argc,
		       struct nvif_mem *);
int nvif_mem_ctor(struct nvif_mmu *mmu, const char *name, s32 oclass, u8 type,
		  u8 page, u64 size, void *argv, u32 argc, struct nvif_mem *);
void nvif_mem_dtor(struct nvif_mem *);

int nvif_mem_ctor_map(struct nvif_mmu *, const char *name, u8 type, u64 size,
		      struct nvif_mem *);
#endif

Annotation

• Immediate include surface: `mmu.h`.
• Detected declarations: `struct nvif_mem`.
• Atlas domain: Driver Families / drivers/gpu.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.