drivers/gpu/drm/nouveau/include/nvkm/core/device.h

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/include/nvkm/core/device.h

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/nouveau/include/nvkm/core/device.h
Extension
.h
Size
4989 bytes
Lines
166
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct nvkm_device {
	const struct nvkm_device_func *func;
	const struct nvkm_device_quirk *quirk;
	struct device *dev;
	enum nvkm_device_type type;
	u64 handle;
	const char *name;
	const char *cfgopt;
	const char *dbgopt;

	struct list_head head;
	struct mutex mutex;
	int refcount;

	void __iomem *pri;

	u32 debug;

	const struct nvkm_device_chip *chip;
	enum {
		NV_04    = 0x04,
		NV_10    = 0x10,
		NV_11    = 0x11,
		NV_20    = 0x20,
		NV_30    = 0x30,
		NV_40    = 0x40,
		NV_50    = 0x50,
		NV_C0    = 0xc0,
		NV_E0    = 0xe0,
		GM100    = 0x110,
		GP100    = 0x130,
		GV100    = 0x140,
		TU100    = 0x160,
		GA100    = 0x170,
		GH100    = 0x180,
		AD100    = 0x190,
		GB10x    = 0x1a0,
		GB20x    = 0x1b0,
	} card_type;
	u32 chipset;
	u8  chiprev;
	u32 crystal;

	struct {
		struct notifier_block nb;
	} acpi;

#define NVKM_LAYOUT_ONCE(type,data,ptr) data *ptr;
#define NVKM_LAYOUT_INST(type,data,ptr,cnt) data *ptr[cnt];
#include <core/layout.h>
#undef NVKM_LAYOUT_INST
#undef NVKM_LAYOUT_ONCE
	struct list_head subdev;

	struct {
		struct list_head intr;
		struct list_head prio[NVKM_INTR_PRIO_NR];
		spinlock_t lock;
		int irq;
		bool alloc;
		bool armed;
		bool legacy_done;
	} intr;
};

struct nvkm_subdev *nvkm_device_subdev(struct nvkm_device *, int type, int inst);
struct nvkm_engine *nvkm_device_engine(struct nvkm_device *, int type, int inst);

enum nvkm_bar_id {
	NVKM_BAR_INVALID = 0,
	NVKM_BAR0_PRI,
	NVKM_BAR1_FB,
	NVKM_BAR2_INST,
};

struct nvkm_device_func {
	struct nvkm_device_pci *(*pci)(struct nvkm_device *);
	struct nvkm_device_tegra *(*tegra)(struct nvkm_device *);
	void *(*dtor)(struct nvkm_device *);
	int (*preinit)(struct nvkm_device *);
	int (*init)(struct nvkm_device *);
	void (*fini)(struct nvkm_device *, enum nvkm_suspend_state suspend);
	int (*irq)(struct nvkm_device *);
	resource_size_t (*resource_addr)(struct nvkm_device *, enum nvkm_bar_id);
	resource_size_t (*resource_size)(struct nvkm_device *, enum nvkm_bar_id);
	bool cpu_coherent;
};

struct nvkm_device_quirk {
	u8 tv_pin_mask;

Annotation

Implementation Notes