drivers/gpu/drm/nouveau/nouveau_bo5039.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/nouveau_bo5039.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/nouveau/nouveau_bo5039.c- Extension
.c- Size
- 4616 bytes
- Lines
- 152
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
nouveau_bo.hnouveau_dma.hnouveau_drv.hnouveau_mem.hnvif/push206e.hnvhw/class/cl5039.h
Detected Declarations
function filesfunction nv50_bo_move_init
Annotated Snippet
if (src_tiled) {
PUSH_MTHD(push, NV5039, SET_SRC_MEMORY_LAYOUT,
NVDEF(NV5039, SET_SRC_MEMORY_LAYOUT, V, BLOCKLINEAR),
SET_SRC_BLOCK_SIZE,
NVDEF(NV5039, SET_SRC_BLOCK_SIZE, WIDTH, ONE_GOB) |
NVDEF(NV5039, SET_SRC_BLOCK_SIZE, HEIGHT, ONE_GOB) |
NVDEF(NV5039, SET_SRC_BLOCK_SIZE, DEPTH, ONE_GOB),
SET_SRC_WIDTH, stride,
SET_SRC_HEIGHT, height,
SET_SRC_DEPTH, 1,
SET_SRC_LAYER, 0,
SET_SRC_ORIGIN,
NVVAL(NV5039, SET_SRC_ORIGIN, X, 0) |
NVVAL(NV5039, SET_SRC_ORIGIN, Y, 0));
} else {
PUSH_MTHD(push, NV5039, SET_SRC_MEMORY_LAYOUT,
NVDEF(NV5039, SET_SRC_MEMORY_LAYOUT, V, PITCH));
}
if (dst_tiled) {
PUSH_MTHD(push, NV5039, SET_DST_MEMORY_LAYOUT,
NVDEF(NV5039, SET_DST_MEMORY_LAYOUT, V, BLOCKLINEAR),
SET_DST_BLOCK_SIZE,
NVDEF(NV5039, SET_DST_BLOCK_SIZE, WIDTH, ONE_GOB) |
NVDEF(NV5039, SET_DST_BLOCK_SIZE, HEIGHT, ONE_GOB) |
NVDEF(NV5039, SET_DST_BLOCK_SIZE, DEPTH, ONE_GOB),
SET_DST_WIDTH, stride,
SET_DST_HEIGHT, height,
SET_DST_DEPTH, 1,
SET_DST_LAYER, 0,
SET_DST_ORIGIN,
NVVAL(NV5039, SET_DST_ORIGIN, X, 0) |
NVVAL(NV5039, SET_DST_ORIGIN, Y, 0));
} else {
PUSH_MTHD(push, NV5039, SET_DST_MEMORY_LAYOUT,
NVDEF(NV5039, SET_DST_MEMORY_LAYOUT, V, PITCH));
}
PUSH_MTHD(push, NV5039, OFFSET_IN_UPPER,
NVVAL(NV5039, OFFSET_IN_UPPER, VALUE, upper_32_bits(src_offset)),
OFFSET_OUT_UPPER,
NVVAL(NV5039, OFFSET_OUT_UPPER, VALUE, upper_32_bits(dst_offset)));
PUSH_MTHD(push, NV5039, OFFSET_IN, lower_32_bits(src_offset),
OFFSET_OUT, lower_32_bits(dst_offset),
PITCH_IN, stride,
PITCH_OUT, stride,
LINE_LENGTH_IN, stride,
LINE_COUNT, height,
FORMAT,
NVDEF(NV5039, FORMAT, IN, ONE) |
NVDEF(NV5039, FORMAT, OUT, ONE),
BUFFER_NOTIFY,
NVDEF(NV5039, BUFFER_NOTIFY, TYPE, WRITE_ONLY));
PUSH_MTHD(push, NV5039, NO_OPERATION, 0x00000000);
length -= amount;
src_offset += amount;
dst_offset += amount;
}
return 0;
}
int
nv50_bo_move_init(struct nouveau_channel *chan, u32 handle)
{
struct nvif_push *push = &chan->chan.push;
int ret;
ret = PUSH_WAIT(push, 6);
if (ret)
return ret;
PUSH_MTHD(push, NV5039, SET_OBJECT, handle);
PUSH_MTHD(push, NV5039, SET_CONTEXT_DMA_NOTIFY, chan->cli->drm->ntfy.handle,
SET_CONTEXT_DMA_BUFFER_IN, chan->vram.handle,
SET_CONTEXT_DMA_BUFFER_OUT, chan->vram.handle);
return 0;
}
Annotation
- Immediate include surface: `nouveau_bo.h`, `nouveau_dma.h`, `nouveau_drv.h`, `nouveau_mem.h`, `nvif/push206e.h`, `nvhw/class/cl5039.h`.
- Detected declarations: `function files`, `function nv50_bo_move_init`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.