drivers/gpu/drm/nouveau/nouveau_boa0b5.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/nouveau_boa0b5.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/nouveau/nouveau_boa0b5.c- Extension
.c- Size
- 3112 bytes
- Lines
- 91
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
nouveau_bo.hnouveau_dma.hnouveau_mem.hnvif/push906f.hnvhw/class/cla0b5.h
Detected Declarations
function filesfunction nve0_bo_move_init
Annotated Snippet
#include "nouveau_bo.h"
#include "nouveau_dma.h"
#include "nouveau_mem.h"
#include <nvif/push906f.h>
#include <nvhw/class/cla0b5.h>
int
nve0_bo_move_copy(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
struct ttm_resource *old_reg, struct ttm_resource *new_reg)
{
struct nouveau_mem *mem = nouveau_mem(old_reg);
struct nvif_push *push = &chan->chan.push;
int ret;
ret = PUSH_WAIT(push, 10);
if (ret)
return ret;
PUSH_MTHD(push, NVA0B5, OFFSET_IN_UPPER,
NVVAL(NVA0B5, OFFSET_IN_UPPER, UPPER, upper_32_bits(mem->vma[0].addr)),
OFFSET_IN_LOWER, lower_32_bits(mem->vma[0].addr),
OFFSET_OUT_UPPER,
NVVAL(NVA0B5, OFFSET_OUT_UPPER, UPPER, upper_32_bits(mem->vma[1].addr)),
OFFSET_OUT_LOWER, lower_32_bits(mem->vma[1].addr),
PITCH_IN, PAGE_SIZE,
PITCH_OUT, PAGE_SIZE,
LINE_LENGTH_IN, PAGE_SIZE,
LINE_COUNT, PFN_UP(new_reg->size));
PUSH_IMMD(push, NVA0B5, LAUNCH_DMA,
NVDEF(NVA0B5, LAUNCH_DMA, DATA_TRANSFER_TYPE, NON_PIPELINED) |
NVDEF(NVA0B5, LAUNCH_DMA, FLUSH_ENABLE, TRUE) |
NVDEF(NVA0B5, LAUNCH_DMA, SEMAPHORE_TYPE, NONE) |
NVDEF(NVA0B5, LAUNCH_DMA, INTERRUPT_TYPE, NONE) |
NVDEF(NVA0B5, LAUNCH_DMA, SRC_MEMORY_LAYOUT, PITCH) |
NVDEF(NVA0B5, LAUNCH_DMA, DST_MEMORY_LAYOUT, PITCH) |
NVDEF(NVA0B5, LAUNCH_DMA, MULTI_LINE_ENABLE, TRUE) |
NVDEF(NVA0B5, LAUNCH_DMA, REMAP_ENABLE, FALSE) |
NVDEF(NVA0B5, LAUNCH_DMA, BYPASS_L2, USE_PTE_SETTING) |
NVDEF(NVA0B5, LAUNCH_DMA, SRC_TYPE, VIRTUAL) |
NVDEF(NVA0B5, LAUNCH_DMA, DST_TYPE, VIRTUAL));
return 0;
}
int
nve0_bo_move_init(struct nouveau_channel *chan, u32 handle)
{
struct nvif_push *push = &chan->chan.push;
int ret;
ret = PUSH_WAIT(push, 2);
if (ret)
return ret;
PUSH_NVSQ(push, NVA0B5, 0x0000, handle & 0x0000ffff);
return 0;
}
Annotation
- Immediate include surface: `nouveau_bo.h`, `nouveau_dma.h`, `nouveau_mem.h`, `nvif/push906f.h`, `nvhw/class/cla0b5.h`.
- Detected declarations: `function files`, `function nve0_bo_move_init`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.