drivers/gpu/drm/nouveau/nouveau_dmem.h

File Facts

System

Linux kernel

Corpus path

drivers/gpu/drm/nouveau/nouveau_dmem.h

Extension

.h

Size

2125 bytes

Lines

51

Domain

Driver Families

Bucket

drivers/gpu

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• nvif/os.h

Detected Declarations

• struct drm_device
• struct drm_file
• struct nouveau_drm
• struct nouveau_svmm
• struct hmm_range
• function nouveau_dmem_init

Annotated Snippet

static inline void nouveau_dmem_init(struct nouveau_drm *drm) {}
static inline void nouveau_dmem_fini(struct nouveau_drm *drm) {}
static inline void nouveau_dmem_suspend(struct nouveau_drm *drm) {}
static inline void nouveau_dmem_resume(struct nouveau_drm *drm) {}
#endif /* IS_ENABLED(CONFIG_DRM_NOUVEAU_SVM) */
#endif

Annotation

• Immediate include surface: `nvif/os.h`.
• Detected declarations: `struct drm_device`, `struct drm_file`, `struct nouveau_drm`, `struct nouveau_svmm`, `struct hmm_range`, `function nouveau_dmem_init`.
• Atlas domain: Driver Families / drivers/gpu.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.