drivers/gpu/drm/nouveau/nv04_fence.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/nv04_fence.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/nouveau/nv04_fence.c- Extension
.c- Size
- 3021 bytes
- Lines
- 113
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
nouveau_drv.hnouveau_dma.hnouveau_fence.hnvif/if0004.hnvif/push006c.h
Detected Declarations
struct nv04_fence_chanstruct nv04_fence_privfunction nv04_fence_emitfunction nv04_fence_syncfunction nv04_fence_readfunction nv04_fence_context_delfunction nv04_fence_context_newfunction nv04_fence_destroyfunction nv04_fence_create
Annotated Snippet
struct nv04_fence_chan {
struct nouveau_fence_chan base;
};
struct nv04_fence_priv {
struct nouveau_fence_priv base;
};
static int
nv04_fence_emit(struct nouveau_fence *fence)
{
struct nvif_push *push = &unrcu_pointer(fence->channel)->chan.push;
int ret = PUSH_WAIT(push, 2);
if (ret == 0) {
PUSH_NVSQ(push, NV_SW, 0x0150, fence->base.seqno);
PUSH_KICK(push);
}
return ret;
}
static int
nv04_fence_sync(struct nouveau_fence *fence,
struct nouveau_channel *prev, struct nouveau_channel *chan)
{
return -ENODEV;
}
static u32
nv04_fence_read(struct nouveau_channel *chan)
{
struct nv04_nvsw_get_ref_v0 args = {};
WARN_ON(nvif_object_mthd(&chan->nvsw, NV04_NVSW_GET_REF,
&args, sizeof(args)));
return args.ref;
}
static void
nv04_fence_context_del(struct nouveau_channel *chan)
{
struct nv04_fence_chan *fctx = chan->fence;
nouveau_fence_context_del(&fctx->base);
chan->fence = NULL;
nouveau_fence_context_free(&fctx->base);
}
static int
nv04_fence_context_new(struct nouveau_channel *chan)
{
struct nv04_fence_chan *fctx = kzalloc_obj(*fctx);
if (fctx) {
nouveau_fence_context_new(chan, &fctx->base);
fctx->base.emit = nv04_fence_emit;
fctx->base.sync = nv04_fence_sync;
fctx->base.read = nv04_fence_read;
chan->fence = fctx;
return 0;
}
return -ENOMEM;
}
static void
nv04_fence_destroy(struct nouveau_drm *drm)
{
struct nv04_fence_priv *priv = drm->fence;
drm->fence = NULL;
kfree(priv);
}
int
nv04_fence_create(struct nouveau_drm *drm)
{
struct nv04_fence_priv *priv;
priv = drm->fence = kzalloc_obj(*priv);
if (!priv)
return -ENOMEM;
priv->base.dtor = nv04_fence_destroy;
priv->base.context_new = nv04_fence_context_new;
priv->base.context_del = nv04_fence_context_del;
return 0;
}
Annotation
- Immediate include surface: `nouveau_drv.h`, `nouveau_dma.h`, `nouveau_fence.h`, `nvif/if0004.h`, `nvif/push006c.h`.
- Detected declarations: `struct nv04_fence_chan`, `struct nv04_fence_priv`, `function nv04_fence_emit`, `function nv04_fence_sync`, `function nv04_fence_read`, `function nv04_fence_context_del`, `function nv04_fence_context_new`, `function nv04_fence_destroy`, `function nv04_fence_create`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.