drivers/gpu/drm/nouveau/nvkm/engine/device/pci.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/nvkm/engine/device/pci.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/nouveau/nvkm/engine/device/pci.c- Extension
.c- Size
- 54021 bytes
- Lines
- 1725
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
core/pci.hpriv.h
Detected Declarations
struct nvkm_device_pci_devicestruct nvkm_device_pci_vendorfunction nvkm_device_pcifunction nvkm_device_pci_resource_idxfunction nvkm_device_pci_resource_addrfunction nvkm_device_pci_resource_sizefunction nvkm_device_pci_irqfunction nvkm_device_pci_finifunction nvkm_device_pci_preinitfunction nvkm_device_pci_dtorfunction nvkm_device_pci_new
Annotated Snippet
struct nvkm_device_pci_device {
u16 device;
const char *name;
const struct nvkm_device_pci_vendor *vendor;
};
struct nvkm_device_pci_vendor {
u16 vendor;
u16 device;
const char *name;
const struct nvkm_device_quirk quirk;
};
static const struct nvkm_device_pci_vendor
nvkm_device_pci_10de_0189[] = {
/* Apple iMac G4 NV18 */
{ 0x10de, 0x0010, NULL, { .tv_gpio = 4 } },
{}
};
static const struct nvkm_device_pci_vendor
nvkm_device_pci_10de_01f0[] = {
/* MSI nForce2 IGP */
{ 0x1462, 0x5710, NULL, { .tv_pin_mask = 0xc } },
{}
};
static const struct nvkm_device_pci_vendor
nvkm_device_pci_10de_0322[] = {
/* Zotac FX5200 */
{ 0x19da, 0x1035, NULL, { .tv_pin_mask = 0xc } },
{ 0x19da, 0x2035, NULL, { .tv_pin_mask = 0xc } },
{}
};
static const struct nvkm_device_pci_vendor
nvkm_device_pci_10de_05e7[] = {
{ 0x10de, 0x0595, "Tesla T10 Processor" },
{ 0x10de, 0x068f, "Tesla T10 Processor" },
{ 0x10de, 0x0697, "Tesla M1060" },
{ 0x10de, 0x0714, "Tesla M1060" },
{ 0x10de, 0x0743, "Tesla M1060" },
{}
};
static const struct nvkm_device_pci_vendor
nvkm_device_pci_10de_0609[] = {
{ 0x106b, 0x00a7, "GeForce 8800 GS" },
{}
};
static const struct nvkm_device_pci_vendor
nvkm_device_pci_10de_062e[] = {
{ 0x106b, 0x0605, "GeForce GT 130" },
{}
};
static const struct nvkm_device_pci_vendor
nvkm_device_pci_10de_0649[] = {
{ 0x1043, 0x202d, "GeForce GT 220M" },
{}
};
static const struct nvkm_device_pci_vendor
nvkm_device_pci_10de_0652[] = {
{ 0x152d, 0x0850, "GeForce GT 240M LE" },
{}
};
static const struct nvkm_device_pci_vendor
nvkm_device_pci_10de_0654[] = {
{ 0x1043, 0x14a2, "GeForce GT 320M" },
{ 0x1043, 0x14d2, "GeForce GT 320M" },
{}
};
static const struct nvkm_device_pci_vendor
nvkm_device_pci_10de_0655[] = {
{ 0x106b, 0x0633, "GeForce GT 120" },
{}
};
static const struct nvkm_device_pci_vendor
nvkm_device_pci_10de_0656[] = {
{ 0x106b, 0x0693, "GeForce GT 120" },
{}
};
static const struct nvkm_device_pci_vendor
nvkm_device_pci_10de_06d1[] = {
Annotation
- Immediate include surface: `core/pci.h`, `priv.h`.
- Detected declarations: `struct nvkm_device_pci_device`, `struct nvkm_device_pci_vendor`, `function nvkm_device_pci`, `function nvkm_device_pci_resource_idx`, `function nvkm_device_pci_resource_addr`, `function nvkm_device_pci_resource_size`, `function nvkm_device_pci_irq`, `function nvkm_device_pci_fini`, `function nvkm_device_pci_preinit`, `function nvkm_device_pci_dtor`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.