drivers/gpu/drm/nouveau/nvkm/engine/disp/gt215.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/nvkm/engine/disp/gt215.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/nouveau/nvkm/engine/disp/gt215.c
Extension
.c
Size
8173 bytes
Lines
268
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#include "priv.h"
#include "chan.h"
#include "hdmi.h"
#include "head.h"
#include "ior.h"

#include <subdev/timer.h>

#include <nvif/class.h>

static void
gt215_sor_hda_eld(struct nvkm_ior *ior, int head, u8 *data, u8 size)
{
	struct nvkm_device *device = ior->disp->engine.subdev.device;
	const u32 soff = ior->id * 0x800;
	int i;

	for (i = 0; i < size; i++)
		nvkm_wr32(device, 0x61c440 + soff, (i << 8) | data[i]);
	for (; i < 0x60; i++)
		nvkm_wr32(device, 0x61c440 + soff, (i << 8));
	nvkm_mask(device, 0x61c448 + soff, 0x80000002, 0x80000002);
}

static void
gt215_sor_hda_hpd(struct nvkm_ior *ior, int head, bool present)
{
	struct nvkm_device *device = ior->disp->engine.subdev.device;
	u32 data = 0x80000000;
	u32 mask = 0x80000001;
	if (present)
		data |= 0x00000001;
	else
		mask |= 0x00000002;
	nvkm_mask(device, 0x61c448 + ior->id * 0x800, mask, data);
}

const struct nvkm_ior_func_hda
gt215_sor_hda = {
	.hpd = gt215_sor_hda_hpd,
	.eld = gt215_sor_hda_eld,
};

void
gt215_sor_dp_audio(struct nvkm_ior *sor, int head, bool enable)
{
	struct nvkm_device *device = sor->disp->engine.subdev.device;
	const u32 soff = nv50_ior_base(sor);
	const u32 data = 0x80000000 | (0x00000001 * enable);
	const u32 mask = 0x8000000d;

	nvkm_mask(device, 0x61c1e0 + soff, mask, data);
	nvkm_msec(device, 2000,
		if (!(nvkm_rd32(device, 0x61c1e0 + soff) & 0x80000000))
			break;
	);
}

static const struct nvkm_ior_func_dp
gt215_sor_dp = {
	.lanes = { 2, 1, 0, 3 },
	.links = g94_sor_dp_links,
	.power = g94_sor_dp_power,
	.pattern = g94_sor_dp_pattern,
	.drive = g94_sor_dp_drive,
	.audio = gt215_sor_dp_audio,
	.audio_sym = g94_sor_dp_audio_sym,
	.activesym = g94_sor_dp_activesym,
	.watermark = g94_sor_dp_watermark,
};

static void
gt215_sor_hdmi_infoframe_vsi(struct nvkm_ior *ior, int head, void *data, u32 size)
{
	struct nvkm_device *device = ior->disp->engine.subdev.device;
	struct packed_hdmi_infoframe vsi;
	const u32 soff = nv50_ior_base(ior);

	pack_hdmi_infoframe(&vsi, data, size);

	nvkm_mask(device, 0x61c53c + soff, 0x00010001, 0x00010000);
	if (!size)
		return;

	nvkm_wr32(device, 0x61c544 + soff, vsi.header);
	nvkm_wr32(device, 0x61c548 + soff, vsi.subpack0_low);
	nvkm_wr32(device, 0x61c54c + soff, vsi.subpack0_high);
	/* Is there a second (or up to fourth?) set of subpack registers here? */
	/* nvkm_wr32(device, 0x61c550 + soff, vsi.subpack1_low); */
	/* nvkm_wr32(device, 0x61c554 + soff, vsi.subpack1_high); */

Annotation

Implementation Notes