drivers/gpu/drm/nouveau/nvkm/engine/dma/user.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/nvkm/engine/dma/user.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/nouveau/nvkm/engine/dma/user.c- Extension
.c- Size
- 3828 bytes
- Lines
- 139
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
user.hcore/client.hcore/gpuobj.hsubdev/fb.hnvif/cl0002.hnvif/unpack.h
Detected Declarations
function nvkm_dmaobj_searchfunction nvkm_dmaobj_bindfunction nvkm_dmaobj_dtorfunction nvkm_dmaobj_ctor
Annotated Snippet
#include "user.h"
#include <core/client.h>
#include <core/gpuobj.h>
#include <subdev/fb.h>
#include <nvif/cl0002.h>
#include <nvif/unpack.h>
static const struct nvkm_object_func nvkm_dmaobj_func;
struct nvkm_dmaobj *
nvkm_dmaobj_search(struct nvkm_client *client, u64 handle)
{
struct nvkm_object *object;
object = nvkm_object_search(client, handle, &nvkm_dmaobj_func);
if (IS_ERR(object))
return (void *)object;
return nvkm_dmaobj(object);
}
static int
nvkm_dmaobj_bind(struct nvkm_object *base, struct nvkm_gpuobj *gpuobj,
int align, struct nvkm_gpuobj **pgpuobj)
{
struct nvkm_dmaobj *dmaobj = nvkm_dmaobj(base);
return dmaobj->func->bind(dmaobj, gpuobj, align, pgpuobj);
}
static void *
nvkm_dmaobj_dtor(struct nvkm_object *base)
{
return nvkm_dmaobj(base);
}
static const struct nvkm_object_func
nvkm_dmaobj_func = {
.dtor = nvkm_dmaobj_dtor,
.bind = nvkm_dmaobj_bind,
};
int
nvkm_dmaobj_ctor(const struct nvkm_dmaobj_func *func, struct nvkm_dma *dma,
const struct nvkm_oclass *oclass, void **pdata, u32 *psize,
struct nvkm_dmaobj *dmaobj)
{
union {
struct nv_dma_v0 v0;
} *args = *pdata;
struct nvkm_object *parent = oclass->parent;
void *data = *pdata;
u32 size = *psize;
int ret = -ENOSYS;
nvkm_object_ctor(&nvkm_dmaobj_func, oclass, &dmaobj->object);
dmaobj->func = func;
dmaobj->dma = dma;
nvif_ioctl(parent, "create dma size %d\n", *psize);
if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, true))) {
nvif_ioctl(parent, "create dma vers %d target %d access %d "
"start %016llx limit %016llx\n",
args->v0.version, args->v0.target, args->v0.access,
args->v0.start, args->v0.limit);
dmaobj->target = args->v0.target;
dmaobj->access = args->v0.access;
dmaobj->start = args->v0.start;
dmaobj->limit = args->v0.limit;
} else
return ret;
*pdata = data;
*psize = size;
if (dmaobj->start > dmaobj->limit)
return -EINVAL;
switch (dmaobj->target) {
case NV_DMA_V0_TARGET_VM:
dmaobj->target = NV_MEM_TARGET_VM;
break;
case NV_DMA_V0_TARGET_VRAM:
dmaobj->target = NV_MEM_TARGET_VRAM;
break;
case NV_DMA_V0_TARGET_PCI:
dmaobj->target = NV_MEM_TARGET_PCI;
break;
case NV_DMA_V0_TARGET_PCI_US:
case NV_DMA_V0_TARGET_AGP:
Annotation
- Immediate include surface: `user.h`, `core/client.h`, `core/gpuobj.h`, `subdev/fb.h`, `nvif/cl0002.h`, `nvif/unpack.h`.
- Detected declarations: `function nvkm_dmaobj_search`, `function nvkm_dmaobj_bind`, `function nvkm_dmaobj_dtor`, `function nvkm_dmaobj_ctor`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.