drivers/gpu/drm/nouveau/nvkm/engine/fifo/chid.h

File Facts

System

Linux kernel

Corpus path

drivers/gpu/drm/nouveau/nvkm/engine/fifo/chid.h

Extension

.h

Size

612 bytes

Lines

26

Domain

Driver Families

Bucket

drivers/gpu

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• core/event.h

Detected Declarations

• struct nvkm_chid

Annotated Snippet

struct nvkm_chid {
	struct kref kref;
	int nr;
	u32 mask;

	struct nvkm_event event;

	void **data;

	spinlock_t lock;
	unsigned long used[];
};

int nvkm_chid_new(const struct nvkm_event_func *, struct nvkm_subdev *,
		  int nr, int first, int count, struct nvkm_chid **pchid);
struct nvkm_chid *nvkm_chid_ref(struct nvkm_chid *);
void nvkm_chid_unref(struct nvkm_chid **);
int nvkm_chid_get(struct nvkm_chid *, void *data);
void nvkm_chid_put(struct nvkm_chid *, int id, spinlock_t *data_lock);
#endif

Annotation

• Immediate include surface: `core/event.h`.
• Detected declarations: `struct nvkm_chid`.
• Atlas domain: Driver Families / drivers/gpu.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.