drivers/gpu/drm/nouveau/nvkm/engine/fifo/g98.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/nvkm/engine/fifo/g98.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/nouveau/nvkm/engine/fifo/g98.c- Extension
.c- Size
- 2540 bytes
- Lines
- 71
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
priv.hchan.hrunl.hnvif/class.h
Detected Declarations
function filesfunction g98_fifo_new
Annotated Snippet
#include "priv.h"
#include "chan.h"
#include "runl.h"
#include <nvif/class.h>
static int
g98_fifo_runl_ctor(struct nvkm_fifo *fifo)
{
struct nvkm_runl *runl;
runl = nvkm_runl_new(fifo, 0, 0, 0);
if (IS_ERR(runl))
return PTR_ERR(runl);
nvkm_runl_add(runl, 0, fifo->func->engn_sw, NVKM_ENGINE_SW, 0);
nvkm_runl_add(runl, 0, fifo->func->engn_sw, NVKM_ENGINE_DMAOBJ, 0);
nvkm_runl_add(runl, 1, fifo->func->engn, NVKM_ENGINE_GR, 0);
nvkm_runl_add(runl, 2, fifo->func->engn, NVKM_ENGINE_MSPPP, 0);
nvkm_runl_add(runl, 3, fifo->func->engn, NVKM_ENGINE_CE, 0);
nvkm_runl_add(runl, 4, fifo->func->engn, NVKM_ENGINE_MSPDEC, 0);
nvkm_runl_add(runl, 5, fifo->func->engn, NVKM_ENGINE_SEC, 0);
nvkm_runl_add(runl, 6, fifo->func->engn, NVKM_ENGINE_MSVLD, 0);
return 0;
}
static const struct nvkm_fifo_func
g98_fifo = {
.chid_nr = nv50_fifo_chid_nr,
.chid_ctor = nv50_fifo_chid_ctor,
.runl_ctor = g98_fifo_runl_ctor,
.init = nv50_fifo_init,
.intr = nv04_fifo_intr,
.pause = nv04_fifo_pause,
.start = nv04_fifo_start,
.nonstall = &g84_fifo_nonstall,
.runl = &nv50_runl,
.engn = &g84_engn,
.engn_sw = &nv50_engn_sw,
.cgrp = {{ }, &nv04_cgrp },
.chan = {{ 0, 0, G82_CHANNEL_GPFIFO }, &g84_chan },
};
int
g98_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
struct nvkm_fifo **pfifo)
{
return nvkm_fifo_new_(&g98_fifo, device, type, inst, pfifo);
}
Annotation
- Immediate include surface: `priv.h`, `chan.h`, `runl.h`, `nvif/class.h`.
- Detected declarations: `function files`, `function g98_fifo_new`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.