drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c
Extension
.c
Size
26564 bytes
Lines
970
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

struct gf100_engn_status {
	bool busy;
	bool save;
	bool unk0;
	bool unk1;
	u8   chid;
};

static void
gf100_engn_status(struct nvkm_engn *engn, struct gf100_engn_status *status)
{
	u32 stat = nvkm_rd32(engn->engine->subdev.device, 0x002640 + (engn->id * 4));

	status->busy = (stat & 0x10000000);
	status->save = (stat & 0x00100000);
	status->unk0 = (stat & 0x00004000);
	status->unk1 = (stat & 0x00001000);
	status->chid = (stat & 0x0000007f);

	ENGN_DEBUG(engn, "%08x: busy %d save %d unk0 %d unk1 %d chid %d",
		   stat, status->busy, status->save, status->unk0, status->unk1, status->chid);
}

static int
gf100_engn_cxid(struct nvkm_engn *engn, bool *cgid)
{
	struct gf100_engn_status status;

	gf100_engn_status(engn, &status);
	if (status.busy) {
		*cgid = false;
		return status.chid;
	}

	return -ENODEV;
}

static bool
gf100_engn_chsw(struct nvkm_engn *engn)
{
	struct gf100_engn_status status;

	gf100_engn_status(engn, &status);
	if (status.busy && (status.unk0 || status.unk1))
		return true;

	return false;
}

static const struct nvkm_engn_func
gf100_engn = {
	.chsw = gf100_engn_chsw,
	.cxid = gf100_engn_cxid,
	.mmu_fault_trigger = gf100_engn_mmu_fault_trigger,
	.mmu_fault_triggered = gf100_engn_mmu_fault_triggered,
	.ctor = gf100_ectx_ctor,
	.bind = gf100_ectx_bind,
};

const struct nvkm_engn_func
gf100_engn_sw = {
};

static const struct nvkm_bitfield
gf100_runq_intr_0_names[] = {
/*	{ 0x00008000, "" }	seen with null ib push */
	{ 0x00200000, "ILLEGAL_MTHD" },
	{ 0x00800000, "EMPTY_SUBC" },
	{}
};

bool
gf100_runq_intr(struct nvkm_runq *runq, struct nvkm_runl *null)
{
	struct nvkm_subdev *subdev = &runq->fifo->engine.subdev;
	struct nvkm_device *device = subdev->device;
	u32 mask = nvkm_rd32(device, 0x04010c + (runq->id * 0x2000));
	u32 stat = nvkm_rd32(device, 0x040108 + (runq->id * 0x2000)) & mask;
	u32 addr = nvkm_rd32(device, 0x0400c0 + (runq->id * 0x2000));
	u32 data = nvkm_rd32(device, 0x0400c4 + (runq->id * 0x2000));
	u32 chid = nvkm_rd32(device, 0x040120 + (runq->id * 0x2000)) & runq->fifo->chid->mask;
	u32 subc = (addr & 0x00070000) >> 16;
	u32 mthd = (addr & 0x00003ffc);
	u32 show = stat;
	struct nvkm_chan *chan;
	unsigned long flags;
	char msg[128];

	if (stat & 0x00800000) {
		if (device->sw) {

Annotation

Implementation Notes