drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgv100.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgv100.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgv100.c
Extension
.c
Size
7771 bytes
Lines
223
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#include "ctxgf100.h"

/*******************************************************************************
 * PGRAPH context implementation
 ******************************************************************************/

static const struct gf100_gr_init
gv100_grctx_init_sw_veid_bundle_init_0[] = {
	{ 0x00001000, 64, 0x00100000, 0x00000008 },
	{ 0x00000941, 64, 0x00100000, 0x00000000 },
	{ 0x0000097e, 64, 0x00100000, 0x00000000 },
	{ 0x0000097f, 64, 0x00100000, 0x00000100 },
	{ 0x0000035c, 64, 0x00100000, 0x00000000 },
	{ 0x0000035d, 64, 0x00100000, 0x00000000 },
	{ 0x00000a08, 64, 0x00100000, 0x00000000 },
	{ 0x00000a09, 64, 0x00100000, 0x00000000 },
	{ 0x00000a0a, 64, 0x00100000, 0x00000000 },
	{ 0x00000352, 64, 0x00100000, 0x00000000 },
	{ 0x00000353, 64, 0x00100000, 0x00000000 },
	{ 0x00000358, 64, 0x00100000, 0x00000000 },
	{ 0x00000359, 64, 0x00100000, 0x00000000 },
	{ 0x00000370, 64, 0x00100000, 0x00000000 },
	{ 0x00000371, 64, 0x00100000, 0x00000000 },
	{ 0x00000372, 64, 0x00100000, 0x000fffff },
	{ 0x00000366, 64, 0x00100000, 0x00000000 },
	{ 0x00000367, 64, 0x00100000, 0x00000000 },
	{ 0x00000368, 64, 0x00100000, 0x00000fff },
	{ 0x00000623, 64, 0x00100000, 0x00000000 },
	{ 0x00000624, 64, 0x00100000, 0x00000000 },
	{ 0x0001e100,  1, 0x00000001, 0x02000001 },
	{}
};

static const struct gf100_gr_pack
gv100_grctx_pack_sw_veid_bundle_init[] = {
	{ gv100_grctx_init_sw_veid_bundle_init_0 },
	{}
};

void
gv100_grctx_generate_attrib(struct gf100_gr_chan *chan)
{
	struct gf100_gr *gr = chan->gr;
	const struct gf100_grctx_func *grctx = gr->func->grctx;
	const u32  alpha = grctx->alpha_nr;
	const u32 attrib = grctx->attrib_nr;
	const u32   gfxp = grctx->gfxp_nr;
	const int max_batches = 0xffff;
	u32 size = grctx->alpha_nr_max * gr->tpc_total;
	u32 ao = 0;
	u32 bo = ao + size;
	int gpc, ppc, n = 0;

	gf100_grctx_patch_wr32(chan, 0x405830, attrib);
	gf100_grctx_patch_wr32(chan, 0x40585c, alpha);
	gf100_grctx_patch_wr32(chan, 0x4064c4, ((alpha / 4) << 16) | max_batches);

	for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
		for (ppc = 0; ppc < gr->func->ppc_nr; ppc++, n++) {
			const u32 as =  alpha * gr->ppc_tpc_nr[gpc][ppc];
			const u32 bs = attrib * gr->ppc_tpc_max;
			const u32 gs =   gfxp * gr->ppc_tpc_max;
			const u32 u = 0x418ea0 + (n * 0x04);
			const u32 o = PPC_UNIT(gpc, ppc, 0);

			if (!(gr->ppc_mask[gpc] & (1 << ppc)))
				continue;

			gf100_grctx_patch_wr32(chan, o + 0xc0, gs);
			gf100_grctx_patch_wr32(chan, o + 0xf4, bo);
			gf100_grctx_patch_wr32(chan, o + 0xf0, bs);
			bo += gs;
			gf100_grctx_patch_wr32(chan, o + 0xe4, as);
			gf100_grctx_patch_wr32(chan, o + 0xf8, ao);
			ao += grctx->alpha_nr_max * gr->ppc_tpc_nr[gpc][ppc];
			gf100_grctx_patch_wr32(chan, u, bs);
		}
	}

	gf100_grctx_patch_wr32(chan, 0x4181e4, 0x00000100);
	gf100_grctx_patch_wr32(chan, 0x41befc, 0x00000100);
}

void
gv100_grctx_generate_attrib_cb(struct gf100_gr_chan *chan, u64 addr, u32 size)
{
	gm107_grctx_generate_attrib_cb(chan, addr, size);

	gf100_grctx_patch_wr32(chan, 0x419e00, 0x00000000 | addr >> 12);
	gf100_grctx_patch_wr32(chan, 0x419e04, 0x80000000 | size >> 7);

Annotation

Implementation Notes