drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxnv40.c
Extension
.c
Size
20120 bytes
Lines
694
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

if (nv44_gr_class(ctx->device)) {
			for (i = 0; i < 8; i++)
				gr_def(ctx, 0x400860 + (i * 4), 0x00000001);
		}
		gr_def(ctx, 0x400880, 0x00000040);
		gr_def(ctx, 0x400884, 0x00000040);
		gr_def(ctx, 0x400888, 0x00000040);
		cp_ctx(ctx, 0x400894, 11);
		gr_def(ctx, 0x400894, 0x00000040);
		if (!nv44_gr_class(ctx->device)) {
			for (i = 0; i < 8; i++)
				gr_def(ctx, 0x4008a0 + (i * 4), 0x80000000);
		}
		cp_ctx(ctx, 0x4008e0, 2);
		cp_ctx(ctx, 0x4008f8, 2);
		if (device->chipset == 0x4c ||
		    (device->chipset & 0xf0) == 0x60)
			cp_ctx(ctx, 0x4009f8, 1);
	}
	cp_ctx(ctx, 0x400a00, 73);
	gr_def(ctx, 0x400b0c, 0x0b0b0b0c);
	cp_ctx(ctx, 0x401000, 4);
	cp_ctx(ctx, 0x405004, 1);
	switch (device->chipset) {
	case 0x47:
	case 0x49:
	case 0x4b:
		cp_ctx(ctx, 0x403448, 1);
		gr_def(ctx, 0x403448, 0x00001010);
		break;
	default:
		cp_ctx(ctx, 0x403440, 1);
		switch (device->chipset) {
		case 0x40:
			gr_def(ctx, 0x403440, 0x00000010);
			break;
		case 0x44:
		case 0x46:
		case 0x4a:
			gr_def(ctx, 0x403440, 0x00003010);
			break;
		case 0x41:
		case 0x42:
		case 0x43:
		case 0x4c:
		case 0x4e:
		case 0x67:
		default:
			gr_def(ctx, 0x403440, 0x00001010);
			break;
		}
		break;
	}
}

static void
nv40_gr_construct_state3d(struct nvkm_grctx *ctx)
{
	struct nvkm_device *device = ctx->device;
	int i;

	if (device->chipset == 0x40) {
		cp_ctx(ctx, 0x401880, 51);
		gr_def(ctx, 0x401940, 0x00000100);
	} else
	if (device->chipset == 0x46 || device->chipset == 0x47 ||
	    device->chipset == 0x49 || device->chipset == 0x4b) {
		cp_ctx(ctx, 0x401880, 32);
		for (i = 0; i < 16; i++)
			gr_def(ctx, 0x401880 + (i * 4), 0x00000111);
		if (device->chipset == 0x46)
			cp_ctx(ctx, 0x401900, 16);
		cp_ctx(ctx, 0x401940, 3);
	}
	cp_ctx(ctx, 0x40194c, 18);
	gr_def(ctx, 0x401954, 0x00000111);
	gr_def(ctx, 0x401958, 0x00080060);
	gr_def(ctx, 0x401974, 0x00000080);
	gr_def(ctx, 0x401978, 0xffff0000);
	gr_def(ctx, 0x40197c, 0x00000001);
	gr_def(ctx, 0x401990, 0x46400000);
	if (device->chipset == 0x40) {
		cp_ctx(ctx, 0x4019a0, 2);
		cp_ctx(ctx, 0x4019ac, 5);
	} else {
		cp_ctx(ctx, 0x4019a0, 1);
		cp_ctx(ctx, 0x4019b4, 3);
	}
	gr_def(ctx, 0x4019bc, 0xffff0000);
	switch (device->chipset) {

Annotation

Implementation Notes