drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c- Extension
.c- Size
- 71216 bytes
- Lines
- 2661
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
gf100.hctxgf100.hfuc/os.hcore/client.hcore/firmware.hcore/option.hsubdev/acr.hsubdev/fb.hsubdev/mc.hsubdev/pmu.hsubdev/therm.hsubdev/timer.hengine/fifo.hnvif/class.hnvif/cl9097.hnvif/if900d.hnvif/unpack.hfuc/hubgf100.fuc3.hfuc/gpcgf100.fuc3.h
Detected Declarations
struct gf100_gr_objectfunction filesfunction gf100_gr_zbc_color_getfunction gf100_gr_zbc_clear_depthfunction gf100_gr_zbc_depth_getfunction gf100_fermi_mthd_zbc_colorfunction gf100_fermi_mthd_zbc_depthfunction gf100_fermi_mthdfunction gf100_gr_mthd_set_shader_exceptionsfunction gf100_gr_mthd_swfunction gf100_gr_object_newfunction gf100_gr_object_getfunction gf100_gr_chan_bindfunction gf100_gr_chan_dtorfunction gf100_gr_chan_newfunction gf100_gr_ctxsw_instfunction gf100_gr_fecs_ctrl_ctxswfunction gf100_gr_fecs_start_ctxswfunction gf100_gr_fecs_stop_ctxswfunction gf100_gr_fecs_halt_pipelinefunction gf100_gr_fecs_wfi_golden_savefunction gf100_gr_fecs_bind_pointerfunction gf100_gr_fecs_set_reglist_virtual_addressfunction gf100_gr_fecs_set_reglist_bind_instancefunction gf100_gr_fecs_discover_reglist_image_sizefunction gf100_gr_fecs_elpg_bindfunction gf100_gr_fecs_discover_pm_image_sizefunction gf100_gr_fecs_discover_zcull_image_sizefunction gf100_gr_fecs_discover_image_sizefunction gf100_gr_fecs_set_watchdog_timeoutfunction gf100_gr_chsw_loadfunction gf100_gr_ropsfunction gf100_gr_zbc_initfunction MCfunction gf100_gr_mmiofunction pack_for_each_initfunction gf100_gr_icmdfunction pack_for_each_initfunction gf100_gr_mthdfunction pack_for_each_initfunction gf100_gr_unitsfunction gf100_gr_trap_gpc_ropfunction gf100_gr_trap_mpfunction gf100_gr_trap_tpcfunction gf100_gr_trap_gpcfunction gf100_gr_trap_intrfunction gf100_gr_ctxctl_debug_unitfunction gf100_gr_ctxctl_debug
Annotated Snippet
struct gf100_gr_object {
struct nvkm_object object;
struct gf100_gr_chan *chan;
};
static int
gf100_fermi_mthd_zbc_color(struct nvkm_object *object, void *data, u32 size)
{
struct gf100_gr *gr = gf100_gr(nvkm_gr(object->engine));
union {
struct fermi_a_zbc_color_v0 v0;
} *args = data;
int ret = -ENOSYS;
if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) {
switch (args->v0.format) {
case FERMI_A_ZBC_COLOR_V0_FMT_ZERO:
case FERMI_A_ZBC_COLOR_V0_FMT_UNORM_ONE:
case FERMI_A_ZBC_COLOR_V0_FMT_RF32_GF32_BF32_AF32:
case FERMI_A_ZBC_COLOR_V0_FMT_R16_G16_B16_A16:
case FERMI_A_ZBC_COLOR_V0_FMT_RN16_GN16_BN16_AN16:
case FERMI_A_ZBC_COLOR_V0_FMT_RS16_GS16_BS16_AS16:
case FERMI_A_ZBC_COLOR_V0_FMT_RU16_GU16_BU16_AU16:
case FERMI_A_ZBC_COLOR_V0_FMT_RF16_GF16_BF16_AF16:
case FERMI_A_ZBC_COLOR_V0_FMT_A8R8G8B8:
case FERMI_A_ZBC_COLOR_V0_FMT_A8RL8GL8BL8:
case FERMI_A_ZBC_COLOR_V0_FMT_A2B10G10R10:
case FERMI_A_ZBC_COLOR_V0_FMT_AU2BU10GU10RU10:
case FERMI_A_ZBC_COLOR_V0_FMT_A8B8G8R8:
case FERMI_A_ZBC_COLOR_V0_FMT_A8BL8GL8RL8:
case FERMI_A_ZBC_COLOR_V0_FMT_AN8BN8GN8RN8:
case FERMI_A_ZBC_COLOR_V0_FMT_AS8BS8GS8RS8:
case FERMI_A_ZBC_COLOR_V0_FMT_AU8BU8GU8RU8:
case FERMI_A_ZBC_COLOR_V0_FMT_A2R10G10B10:
case FERMI_A_ZBC_COLOR_V0_FMT_BF10GF11RF11:
ret = gf100_gr_zbc_color_get(gr, args->v0.format,
args->v0.ds,
args->v0.l2);
if (ret >= 0) {
args->v0.index = ret;
return 0;
}
break;
default:
return -EINVAL;
}
}
return ret;
}
static int
gf100_fermi_mthd_zbc_depth(struct nvkm_object *object, void *data, u32 size)
{
struct gf100_gr *gr = gf100_gr(nvkm_gr(object->engine));
union {
struct fermi_a_zbc_depth_v0 v0;
} *args = data;
int ret = -ENOSYS;
if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) {
switch (args->v0.format) {
case FERMI_A_ZBC_DEPTH_V0_FMT_FP32:
ret = gf100_gr_zbc_depth_get(gr, args->v0.format,
args->v0.ds,
args->v0.l2);
return (ret >= 0) ? 0 : -ENOSPC;
default:
return -EINVAL;
}
}
return ret;
}
static int
gf100_fermi_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size)
{
nvif_ioctl(object, "fermi mthd %08x\n", mthd);
switch (mthd) {
case FERMI_A_ZBC_COLOR:
return gf100_fermi_mthd_zbc_color(object, data, size);
case FERMI_A_ZBC_DEPTH:
return gf100_fermi_mthd_zbc_depth(object, data, size);
default:
break;
}
return -EINVAL;
}
Annotation
- Immediate include surface: `gf100.h`, `ctxgf100.h`, `fuc/os.h`, `core/client.h`, `core/firmware.h`, `core/option.h`, `subdev/acr.h`, `subdev/fb.h`.
- Detected declarations: `struct gf100_gr_object`, `function files`, `function gf100_gr_zbc_color_get`, `function gf100_gr_zbc_clear_depth`, `function gf100_gr_zbc_depth_get`, `function gf100_fermi_mthd_zbc_color`, `function gf100_fermi_mthd_zbc_depth`, `function gf100_fermi_mthd`, `function gf100_gr_mthd_set_shader_exceptions`, `function gf100_gr_mthd_sw`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.