drivers/gpu/drm/nouveau/nvkm/engine/gr/gf117.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf117.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf117.c- Extension
.c- Size
- 6211 bytes
- Lines
- 204
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
gf100.hctxgf100.hnvif/class.hfuc/hubgf117.fuc3.hfuc/gpcgf117.fuc3.h
Detected Declarations
function gf117_gr_init_zcullfunction gf117_gr_new
Annotated Snippet
#include "gf100.h"
#include "ctxgf100.h"
#include <nvif/class.h>
/*******************************************************************************
* PGRAPH register lists
******************************************************************************/
static const struct gf100_gr_init
gf117_gr_init_pe_0[] = {
{ 0x41980c, 1, 0x04, 0x00000010 },
{ 0x419844, 1, 0x04, 0x00000000 },
{ 0x41984c, 1, 0x04, 0x00005bc8 },
{ 0x419850, 3, 0x04, 0x00000000 },
{}
};
const struct gf100_gr_init
gf117_gr_init_pes_0[] = {
{ 0x41be04, 1, 0x04, 0x00000000 },
{ 0x41be08, 1, 0x04, 0x00000004 },
{ 0x41be0c, 1, 0x04, 0x00000000 },
{ 0x41be10, 1, 0x04, 0x003b8bc7 },
{ 0x41be14, 2, 0x04, 0x00000000 },
{}
};
const struct gf100_gr_init
gf117_gr_init_wwdx_0[] = {
{ 0x41bfd4, 1, 0x04, 0x00800000 },
{ 0x41bfdc, 1, 0x04, 0x00000000 },
{ 0x41bff8, 2, 0x04, 0x00000000 },
{}
};
const struct gf100_gr_init
gf117_gr_init_cbm_0[] = {
{ 0x41becc, 1, 0x04, 0x00000000 },
{ 0x41bee8, 2, 0x04, 0x00000000 },
{}
};
static const struct gf100_gr_pack
gf117_gr_pack_mmio[] = {
{ gf100_gr_init_main_0 },
{ gf100_gr_init_fe_0 },
{ gf100_gr_init_pri_0 },
{ gf100_gr_init_rstr2d_0 },
{ gf119_gr_init_pd_0 },
{ gf119_gr_init_ds_0 },
{ gf100_gr_init_scc_0 },
{ gf119_gr_init_prop_0 },
{ gf108_gr_init_gpc_unk_0 },
{ gf100_gr_init_setup_0 },
{ gf100_gr_init_crstr_0 },
{ gf108_gr_init_setup_1 },
{ gf100_gr_init_zcull_0 },
{ gf119_gr_init_gpm_0 },
{ gf119_gr_init_gpc_unk_1 },
{ gf100_gr_init_gcc_0 },
{ gf100_gr_init_tpccs_0 },
{ gf119_gr_init_tex_0 },
{ gf117_gr_init_pe_0 },
{ gf100_gr_init_l1c_0 },
{ gf100_gr_init_mpc_0 },
{ gf119_gr_init_sm_0 },
{ gf117_gr_init_pes_0 },
{ gf117_gr_init_wwdx_0 },
{ gf117_gr_init_cbm_0 },
{ gf100_gr_init_be_0 },
{ gf119_gr_init_fe_1 },
{}
};
/*******************************************************************************
* PGRAPH engine/subdev functions
******************************************************************************/
#include "fuc/hubgf117.fuc3.h"
static struct gf100_gr_ucode
gf117_gr_fecs_ucode = {
.code.data = gf117_grhub_code,
.code.size = sizeof(gf117_grhub_code),
.data.data = gf117_grhub_data,
.data.size = sizeof(gf117_grhub_data),
};
#include "fuc/gpcgf117.fuc3.h"
Annotation
- Immediate include surface: `gf100.h`, `ctxgf100.h`, `nvif/class.h`, `fuc/hubgf117.fuc3.h`, `fuc/gpcgf117.fuc3.h`.
- Detected declarations: `function gf117_gr_init_zcull`, `function gf117_gr_new`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.