drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm107.c- Extension
.c- Size
- 12745 bytes
- Lines
- 447
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
gf100.hctxgf100.hsubdev/bios.hsubdev/bios/bit.hsubdev/bios/init.hsubdev/bios/P0260.hsubdev/fb.hnvif/class.hfuc/hubgm107.fuc5.hfuc/gpcgm107.fuc5.h
Detected Declarations
function gm107_gr_init_400054function gm107_gr_init_shader_exceptionsfunction gm107_gr_init_504430function gm107_gr_init_bios_2function gm107_gr_init_biosfunction gm107_gr_init_gpc_mmufunction gm107_gr_new
Annotated Snippet
if (data) {
u8 ver = nvbios_rd08(bios, data + 0x00);
u8 hdr = nvbios_rd08(bios, data + 0x01);
if (ver == 0x20 && hdr >= 8) {
data = nvbios_rd32(bios, data + 0x04);
if (data) {
u32 save = nvkm_rd32(device, 0x619444);
nvbios_init(subdev, data);
nvkm_wr32(device, 0x619444, save);
}
}
}
}
}
void
gm107_gr_init_bios(struct gf100_gr *gr)
{
static const struct {
u32 ctrl;
u32 data;
} regs[] = {
{ 0x419ed8, 0x419ee0 },
{ 0x419ad0, 0x419ad4 },
{ 0x419ae0, 0x419ae4 },
{ 0x419af0, 0x419af4 },
{ 0x419af8, 0x419afc },
};
struct nvkm_device *device = gr->base.engine.subdev.device;
struct nvkm_bios *bios = device->bios;
struct nvbios_P0260E infoE;
struct nvbios_P0260X infoX;
int E = -1, X;
u8 ver, hdr;
while (nvbios_P0260Ep(bios, ++E, &ver, &hdr, &infoE)) {
if (X = -1, E < ARRAY_SIZE(regs)) {
nvkm_wr32(device, regs[E].ctrl, infoE.data);
while (nvbios_P0260Xp(bios, ++X, &ver, &hdr, &infoX))
nvkm_wr32(device, regs[E].data, infoX.data);
}
}
}
static void
gm107_gr_init_gpc_mmu(struct gf100_gr *gr)
{
struct nvkm_device *device = gr->base.engine.subdev.device;
struct nvkm_fb *fb = device->fb;
nvkm_wr32(device, GPC_BCAST(0x0880), 0x00000000);
nvkm_wr32(device, GPC_BCAST(0x0890), 0x00000000);
nvkm_wr32(device, GPC_BCAST(0x0894), 0x00000000);
nvkm_wr32(device, GPC_BCAST(0x08b4), nvkm_memory_addr(fb->mmu_wr) >> 8);
nvkm_wr32(device, GPC_BCAST(0x08b8), nvkm_memory_addr(fb->mmu_rd) >> 8);
}
#include "fuc/hubgm107.fuc5.h"
static struct gf100_gr_ucode
gm107_gr_fecs_ucode = {
.code.data = gm107_grhub_code,
.code.size = sizeof(gm107_grhub_code),
.data.data = gm107_grhub_data,
.data.size = sizeof(gm107_grhub_data),
};
#include "fuc/gpcgm107.fuc5.h"
static struct gf100_gr_ucode
gm107_gr_gpccs_ucode = {
.code.data = gm107_grgpc_code,
.code.size = sizeof(gm107_grgpc_code),
.data.data = gm107_grgpc_data,
.data.size = sizeof(gm107_grgpc_data),
};
static const struct gf100_gr_func
gm107_gr = {
.oneinit_tiles = gf100_gr_oneinit_tiles,
.oneinit_sm_id = gf100_gr_oneinit_sm_id,
.init = gf100_gr_init,
.init_gpc_mmu = gm107_gr_init_gpc_mmu,
.init_bios = gm107_gr_init_bios,
.init_vsc_stream_master = gk104_gr_init_vsc_stream_master,
.init_zcull = gf117_gr_init_zcull,
.init_num_active_ltcs = gf100_gr_init_num_active_ltcs,
.init_rop_active_fbps = gk104_gr_init_rop_active_fbps,
.init_bios_2 = gm107_gr_init_bios_2,
.init_fecs_exceptions = gf100_gr_init_fecs_exceptions,
Annotation
- Immediate include surface: `gf100.h`, `ctxgf100.h`, `subdev/bios.h`, `subdev/bios/bit.h`, `subdev/bios/init.h`, `subdev/bios/P0260.h`, `subdev/fb.h`, `nvif/class.h`.
- Detected declarations: `function gm107_gr_init_400054`, `function gm107_gr_init_shader_exceptions`, `function gm107_gr_init_504430`, `function gm107_gr_init_bios_2`, `function gm107_gr_init_bios`, `function gm107_gr_init_gpc_mmu`, `function gm107_gr_new`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.