drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/nouveau/nvkm/engine/sw/base.c- Extension
.c- Size
- 3190 bytes
- Lines
- 110
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
priv.hchan.hengine/fifo.h
Detected Declarations
function filesfunction nvkm_sw_oclass_newfunction nvkm_sw_oclass_getfunction nvkm_sw_cclass_getfunction nvkm_sw_dtorfunction nvkm_sw_new_
Annotated Snippet
if (chan->fifo->id == chid) {
handled = nvkm_sw_chan_mthd(chan, subc, mthd, data);
list_del(&chan->head);
list_add(&chan->head, &sw->chan);
break;
}
}
spin_unlock_irqrestore(&sw->engine.lock, flags);
return handled;
}
static int
nvkm_sw_oclass_new(const struct nvkm_oclass *oclass, void *data, u32 size,
struct nvkm_object **pobject)
{
struct nvkm_sw_chan *chan = nvkm_sw_chan(oclass->parent);
const struct nvkm_sw_chan_sclass *sclass = oclass->engn;
return sclass->ctor(chan, oclass, data, size, pobject);
}
static int
nvkm_sw_oclass_get(struct nvkm_oclass *oclass, int index)
{
struct nvkm_sw *sw = nvkm_sw(oclass->engine);
int c = 0;
while (sw->func->sclass[c].ctor) {
if (c++ == index) {
oclass->engn = &sw->func->sclass[index];
oclass->base = sw->func->sclass[index].base;
oclass->base.ctor = nvkm_sw_oclass_new;
return index;
}
}
return c;
}
static int
nvkm_sw_cclass_get(struct nvkm_chan *fifoch, const struct nvkm_oclass *oclass,
struct nvkm_object **pobject)
{
struct nvkm_sw *sw = nvkm_sw(oclass->engine);
return sw->func->chan_new(sw, fifoch, oclass, pobject);
}
static void *
nvkm_sw_dtor(struct nvkm_engine *engine)
{
return nvkm_sw(engine);
}
static const struct nvkm_engine_func
nvkm_sw = {
.dtor = nvkm_sw_dtor,
.fifo.cclass = nvkm_sw_cclass_get,
.fifo.sclass = nvkm_sw_oclass_get,
};
int
nvkm_sw_new_(const struct nvkm_sw_func *func, struct nvkm_device *device,
enum nvkm_subdev_type type, int inst, struct nvkm_sw **psw)
{
struct nvkm_sw *sw;
if (!(sw = *psw = kzalloc_obj(*sw)))
return -ENOMEM;
INIT_LIST_HEAD(&sw->chan);
sw->func = func;
return nvkm_engine_ctor(&nvkm_sw, device, type, inst, true, &sw->engine);
}
Annotation
- Immediate include surface: `priv.h`, `chan.h`, `engine/fifo.h`.
- Detected declarations: `function files`, `function nvkm_sw_oclass_new`, `function nvkm_sw_oclass_get`, `function nvkm_sw_cclass_get`, `function nvkm_sw_dtor`, `function nvkm_sw_new_`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.