drivers/gpu/drm/nouveau/nvkm/falcon/ga102.c

Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/nvkm/falcon/ga102.c

File Facts

System
Linux kernel
Corpus path
drivers/gpu/drm/nouveau/nvkm/falcon/ga102.c
Extension
.c
Size
4330 bytes
Lines
155
Domain
Driver Families
Bucket
drivers/gpu
Inferred role
Driver Families: implementation source
Status
source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

Dependency Surface

Detected Declarations

Annotated Snippet

#include "priv.h"

#include <subdev/mc.h>
#include <subdev/timer.h>

bool
ga102_flcn_riscv_active(struct nvkm_falcon *falcon)
{
	return (nvkm_falcon_rd32(falcon, falcon->addr2 + 0x388) & 0x00000080) != 0;
}

static bool
ga102_flcn_dma_done(struct nvkm_falcon *falcon)
{
	return !!(nvkm_falcon_rd32(falcon, 0x118) & 0x00000002);
}

static void
ga102_flcn_dma_xfer(struct nvkm_falcon *falcon, u32 mem_base, u32 dma_base, u32 cmd)
{
	nvkm_falcon_wr32(falcon, 0x114, mem_base);
	nvkm_falcon_wr32(falcon, 0x11c, dma_base);
	nvkm_falcon_wr32(falcon, 0x118, cmd);
}

static int
ga102_flcn_dma_init(struct nvkm_falcon *falcon, u64 dma_addr, int xfer_len,
		    enum nvkm_falcon_mem mem_type, bool sec, u32 *cmd)
{
	*cmd = (ilog2(xfer_len) - 2) << 8;
	if (mem_type == IMEM)
		*cmd |= 0x00000010;
	if (sec)
		*cmd |= 0x00000004;

	nvkm_falcon_wr32(falcon, 0x110, dma_addr >> 8);
	nvkm_falcon_wr32(falcon, 0x128, 0x00000000);
	return 0;
}

const struct nvkm_falcon_func_dma
ga102_flcn_dma = {
	.init = ga102_flcn_dma_init,
	.xfer = ga102_flcn_dma_xfer,
	.done = ga102_flcn_dma_done,
};

int
ga102_flcn_reset_wait_mem_scrubbing(struct nvkm_falcon *falcon)
{
	nvkm_falcon_mask(falcon, 0x040, 0x00000000, 0x00000000);

	if (nvkm_msec(falcon->owner->device, 20,
		if (!(nvkm_falcon_rd32(falcon, 0x0f4) & 0x00001000))
			break;
	) < 0)
		return -ETIMEDOUT;

	return 0;
}

int
ga102_flcn_reset_prep(struct nvkm_falcon *falcon)
{
	nvkm_falcon_rd32(falcon, 0x0f4);

	nvkm_usec(falcon->owner->device, 150,
		if (nvkm_falcon_rd32(falcon, 0x0f4) & 0x80000000)
			break;
		_warn = false;
	);

	return 0;
}

int
ga102_flcn_select(struct nvkm_falcon *falcon)
{
	if ((nvkm_falcon_rd32(falcon, falcon->addr2 + 0x668) & 0x00000010) != 0x00000000) {
		nvkm_falcon_wr32(falcon, falcon->addr2 + 0x668, 0x00000000);
		if (nvkm_msec(falcon->owner->device, 10,
			if (nvkm_falcon_rd32(falcon, falcon->addr2 + 0x668) & 0x00000001)
				break;
		) < 0)
			return -ETIMEDOUT;
	}

	return 0;
}

Annotation

Implementation Notes