drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.h

File Facts

System

Linux kernel

Corpus path

drivers/gpu/drm/nouveau/nvkm/subdev/bus/hwsq.h

Extension

.h

Size

2601 bytes

Lines

149

Domain

Driver Families

Bucket

drivers/gpu

Inferred role

Driver Families: implementation source

Status

source implementation candidate

Why This File Exists

Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.

• Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
• Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.

Dependency Surface

• subdev/bus.h

Detected Declarations

• struct hwsq
• struct hwsq_reg
• function hwsq_stride
• function hwsq_reg2
• function hwsq_reg
• function hwsq_init
• function hwsq_exec
• function hwsq_rd32
• function hwsq_wr32
• function hwsq_nuke
• function hwsq_mask
• function hwsq_setf
• function hwsq_wait
• function hwsq_wait_vblank
• function hwsq_nsec

Annotated Snippet

struct hwsq {
	struct nvkm_subdev *subdev;
	struct nvkm_hwsq *hwsq;
	int sequence;
};

struct hwsq_reg {
	int sequence;
	bool force;
	u32 addr;
	u32 stride; /* in bytes */
	u32 mask;
	u32 data;
};

static inline struct hwsq_reg
hwsq_stride(u32 addr, u32 stride, u32 mask)
{
	return (struct hwsq_reg) {
		.sequence = 0,
		.force = 0,
		.addr = addr,
		.stride = stride,
		.mask = mask,
		.data = 0xdeadbeef,
	};
}

static inline struct hwsq_reg
hwsq_reg2(u32 addr1, u32 addr2)
{
	return (struct hwsq_reg) {
		.sequence = 0,
		.force = 0,
		.addr = addr1,
		.stride = addr2 - addr1,
		.mask = 0x3,
		.data = 0xdeadbeef,
	};
}

static inline struct hwsq_reg
hwsq_reg(u32 addr)
{
	return (struct hwsq_reg) {
		.sequence = 0,
		.force = 0,
		.addr = addr,
		.stride = 0,
		.mask = 0x1,
		.data = 0xdeadbeef,
	};
}

static inline int
hwsq_init(struct hwsq *ram, struct nvkm_subdev *subdev)
{
	int ret;

	ret = nvkm_hwsq_init(subdev, &ram->hwsq);
	if (ret)
		return ret;

	ram->sequence++;
	ram->subdev = subdev;
	return 0;
}

static inline int
hwsq_exec(struct hwsq *ram, bool exec)
{
	int ret = 0;
	if (ram->subdev) {
		ret = nvkm_hwsq_fini(&ram->hwsq, exec);
		ram->subdev = NULL;
	}
	return ret;
}

static inline u32
hwsq_rd32(struct hwsq *ram, struct hwsq_reg *reg)
{
	struct nvkm_device *device = ram->subdev->device;
	if (reg->sequence != ram->sequence)
		reg->data = nvkm_rd32(device, reg->addr);
	return reg->data;
}

static inline void
hwsq_wr32(struct hwsq *ram, struct hwsq_reg *reg, u32 data)

Annotation

• Immediate include surface: `subdev/bus.h`.
• Detected declarations: `struct hwsq`, `struct hwsq_reg`, `function hwsq_stride`, `function hwsq_reg2`, `function hwsq_reg`, `function hwsq_init`, `function hwsq_exec`, `function hwsq_rd32`, `function hwsq_wr32`, `function hwsq_nuke`.
• Atlas domain: Driver Families / drivers/gpu.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.