drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/gb20x.c
Source file repositories/reference/linux-study-clean/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/gb20x.c
File Facts
- System
- Linux kernel
- Corpus path
drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/gb20x.c- Extension
.c- Size
- 989 bytes
- Lines
- 45
- Domain
- Driver Families
- Bucket
- drivers/gpu
- Inferred role
- Driver Families: implementation source
- Status
- source implementation candidate
Why This File Exists
Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Repeatable hardware-adapter layer. Deep compatibility for every driver is out of scope; this atlas records patterns, probe lifecycles, bus glue, IRQ/DMA usage, and links back to core abstractions.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
gpu.hengine/ce/priv.hengine/fifo/priv.hnvif/class.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#include "gpu.h"
#include <engine/ce/priv.h>
#include <engine/fifo/priv.h>
#include <nvif/class.h>
const struct nvkm_rm_gpu
gb20x_gpu = {
.disp.class = {
.root = GB202_DISP,
.caps = GB202_DISP_CAPS,
.core = GB202_DISP_CORE_CHANNEL_DMA,
.wndw = GB202_DISP_WINDOW_CHANNEL_DMA,
.wimm = GB202_DISP_WINDOW_IMM_CHANNEL_DMA,
.curs = GB202_DISP_CURSOR,
},
.usermode.class = BLACKWELL_USERMODE_A,
.fifo.chan = {
.class = BLACKWELL_CHANNEL_GPFIFO_B,
.doorbell_handle = gb202_chan_doorbell_handle,
},
.ce = {
.class = BLACKWELL_DMA_COPY_B,
.grce_mask = gb202_ce_grce_mask,
},
.gr.class = {
.i2m = BLACKWELL_INLINE_TO_MEMORY_A,
.twod = FERMI_TWOD_A,
.threed = BLACKWELL_B,
.compute = BLACKWELL_COMPUTE_B,
},
.nvdec.class = NVCFB0_VIDEO_DECODER,
.nvenc.class = NVCFB7_VIDEO_ENCODER,
.nvjpg.class = NVCFD1_VIDEO_NVJPG,
.ofa.class = NVCFFA_VIDEO_OFA,
};
Annotation
- Immediate include surface: `gpu.h`, `engine/ce/priv.h`, `engine/fifo/priv.h`, `nvif/class.h`.
- Atlas domain: Driver Families / drivers/gpu.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.